As topic says, I'm looking for the patch info on the SE. My SE lost her patch wires during one of my moving operations over the last 5 years.

I have a hope of one day getting her back on her feet again

Last edited by olegil on 25-Feb-2013 at 09:02 PM.

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@olegil

Wich end? I can take pics and send you.

I think that place differ, when they tested, how to get SE work better.

PM me, where I cad drop mail.

@olegil

Cant find it now, but Geri in this wery site has some deep insight about A1 pci priorities and so on.

Google and site:amigaworld.net is your friend, as searh in here is ...

@mlehto

I'm not having much luck with either google or the built-in search. Maybe it's just a bad day

Basically, all four ends of my patches are suspect. Still don't have board in front of me, but think everything were loose. So close-ups or the original modding docs would be awesome. I had those (I did the mods on mine), but that was 3 laptops and 2 desktops ago...

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@mlehto

My email address is (and has always been) known to the public, olegil@samfundet.no (or work oehvitmyren atatat nevion dotdotdot com). Not really that afraid of spam, I don't have time to wade through my hundreds of non-spam emails every day anyway anymore

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@olegil

Still not found anything useful, but at least I finally found someone explaining the DMA fix on the XE. I do wish I had a full set of schematics and layout files for my SE here now. (not to mention schematics and layout for the dual CPU module for the XE, once Thomas gets multicore support working being able to recreate that would be wicked awesome for those unfortunate souls who are stuck without a CPU module )

Last edited by olegil on 25-Feb-2013 at 10:49 PM.

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@olegil

Was the dual CPU module anything more than a showpiece?

@Rob

I'm fairly certain it worked as dual CPU in Linux, but I never saw it.

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@olegil

Quote:

olegil wrote: @olegil Still not found anything useful, but at least I finally found someone explaining the DMA fix on the XE.

IIRC the patch wires only fix the PCI_REQ#/GNT# lines of the onboard ethernet on the A1SE, which I think is not what the DMA fix does. Unfortunately I would also have to take pictures of the board for the exact locations, but I'm far away from my A1SE for the next two weeks.

Quote:

I do wish I had a full set of schematics and layout files for my SE here now. (not to mention schematics and layout for the dual CPU module for the XE, once Thomas gets multicore support working being able to recreate that would be wicked awesome for those unfortunate souls who are stuck without a CPU module )

You're not alone with this wish! But I doubt multicore support is ever going to work on an A1SE/XE/uA1 (at least with hardware enforced coherency), as the northbridge doesn't like the M (memory coherence) bit. On my A1XE G4 the bit has to be cleared, otherwise the machine looks up.

Quote:

olegil wrote: @Rob I'm fairly certain it worked as dual CPU in Linux, but I never saw it.

Any link?

Last edited by Geri on 26-Feb-2013 at 06:48 AM.

_________________
A1SE: G3@600MHz, 2GB, 1GBit network card
A1XE: G4@933MHz, 2GB, refitted AC'97 codec
microA1: G3@800MHz, 1GB

- A1 Linux support -

@Geri

I know it's not the same as the DMA fix, but surfing around for THIS fix made me read what Bill Toner wrote on Ann.lu about a million years ago about the DMA fix, and it sort of made sense.

No rush, really. Just if anyone can document the fixes that should be done to an SE so I can try them out (there was also another fix mentioned that never got done to my board, something about timing? I had all sorts of weird micro-lockups when I started using OS4, which never happened in Linux. Related?)

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@Geri

I didn't think OS4 expected coherency on the ArticiaS anyway? And I thought the CPUs would snoop each other just fine seeing as they would share the 60x bus. Another case of naive optimism?

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@olegil

Mail sent, with pics attached. It may be over 10 mb all together. Hopefully your mailbox is enought big.

if not, I send them again.

@olegil

My SE refused to work with OS4.1 upd3 and up. There is boards, wich work. I might be intrested fixes, wich are implemented with these boards.

@Geri

In general, can I use pci graphics gard any of A1 pci-slots?

And if so, can upper pci66 init and work with ordinary pci32 cards?

It was possible to use both pci66 and agp in same time. It was changed witk uboot update. Afrter that it was exclusive pci66 or agp.

I suspect, that I have some hw-prob wich refuse os4.1 work with my SE with upd3 and up.

So I try with pci radeon.

Tested with agp radeon 9000 pro and radeon 9250.

Cheers,

@olegil

Quote:

olegil wrote: @Geri I know it's not the same as the DMA fix, but surfing around for THIS fix made me read what Bill Toner wrote on Ann.lu about a million years ago about the DMA fix, and it sort of made sense. No rush, really. Just if anyone can document the fixes that should be done to an SE so I can try them out (there was also another fix mentioned that never got done to my board, something about timing? I had all sorts of weird micro-lockups when I started using OS4, which never happened in Linux. Related?)

Another fix? I don't know, but I found out that DMA operations fail on PCI bus 0, even if the onboard IDE and USB controllers are disabled. PCI bus 1 on the other side works flawlessy! Thus I put in an Intel 1GB Ethernet network card there to have a working network connection. So if there is another fix, please let me know!

I also had lockups under OS4 until I completely disabled the onboard IDE controller (even in PIO mode) and moved all devices to a Sii3114 controller (also PIO mode only, as it is on PCI bus 0).

Quote:

olegil wrote: @Geri I didn't think OS4 expected coherency on the ArticiaS anyway? And I thought the CPUs would snoop each other just fine seeing as they would share the 60x bus. Another case of naive optimism?

Yes, the CPUs can snoop each other, but there are some cache handling instructions that are normally not broadcasted on the bus with the coherence bit (M) = 0. Maybe there is another way to force them being broadcasted, but I don't know if that would work exactly the same way as setting M=1 and thus would enforce coherency in all cases.
All I can say, is that Linux relies on the coherence bit being set to 1 for all memory mappings in SMP mode. Maybe the OS4 devs have an idea for software enforced coherency in SMP mode?

_________________
A1SE: G3@600MHz, 2GB, 1GBit network card
A1XE: G4@933MHz, 2GB, refitted AC'97 codec
microA1: G3@800MHz, 1GB

- A1 Linux support -

@mlehto

Quote:

mlehto wrote: @Geri In general, can I use pci graphics gard any of A1 pci-slots?

Well, newer PCI graphics cards with a PCI-to-PCIe bridge only work on PCI bus 0, because U-Boot initializes only the first detected PCI-to-PCI bridge. Old PCI graphics cards (with a real PCI interface) may work in any PCI slot, if they're 3.3V (compatible) cards.

Quote:

And if so, can upper pci66 init and work with ordinary pci32 cards?

That depends on the graphics card. If it comes with another PCI-to-PCI bridge, then no.

Quote:

It was possible to use both pci66 and agp in same time. It was changed witk uboot update. Afrter that it was exclusive pci66 or agp.

From the hardware point of view you can still use a PCI card together with an AGP card on PCI bus 1, given that the AGP card works in plain PCI mode (which I think is always the case on the A1, because the AGP controller is not used). The real problem is the incomplete initialization of other PCI-to-PCI bridges by U-Boot, which essentially hides such cards from the operating system. But any normal PCI card should be initialized correctly also on PCI bus 1 (I put a 1GB Ethernet network card in the 66MHz PCI slot, as I wrote above).

Quote:

I suspect, that I have some hw-prob wich refuse os4.1 work with my SE with upd3 and up.

I have OS4.1 with update 5 running, IIRC. But I had to disable onboard USB and IDE.

Quote:

So I try with pci radeon. Tested with agp radeon 9000 pro and radeon 9250.

I would say a Radeon 9xxx should work.

Does it show up in the list of PCI devices? Or how did you test it?

_________________
A1SE: G3@600MHz, 2GB, 1GBit network card
A1XE: G4@933MHz, 2GB, refitted AC'97 codec
microA1: G3@800MHz, 1GB

- A1 Linux support -

@olegil



http://web.archive.org/web/20051031143933/http://personal.inet.fi/cool/pekosbil/A1_BoardBig.jpg

_________________
Support AROS sponsor a developer.

"AROS is prolly illegal ~ Evert Carton" intentionally quoted out of context for dramatic effect

@terminills

This A1SE board seems to have some additional fixes. The GAL below the CPU for example is missing on my A1SE.

@olegil: Does you A1SE have this GAL?

_________________
A1SE: G3@600MHz, 2GB, 1GBit network card
A1XE: G4@933MHz, 2GB, refitted AC'97 codec
microA1: G3@800MHz, 1GB

- A1 Linux support -

@mlehto

Quote:

My SE refused to work with OS4.1 upd3 and up

Onboard IDE or Sii card ?

_________________
Rock lobster bit me. My Workbench has always preferences. X1000 + AmigaOS4.1 FE
"Anyone can build a fast CPU. The trick is to build a fast system." -Seymour Cray

@Geri

About GAL.

Mine has.

I sent wiring patch instructions today to olegil.

Mine has allso 6 wires.

If olegil has only two wires, then it is not same.

I think that there is multiple different SE:s around.