http://www.apollo-core.com/bringup/

Some nice pictures and videos here.

Also a demo file
http://www.apollo-core.com/phoenix_demo4


Some early videos
https://www.youtube.com/watch?v=v1yMMhFtU68

https://www.youtube.com/watch?v=ZB0lB_br6xI

https://www.youtube.com/watch?v=9ncJs87hDkg


Quote:

The Core is fully written in VHDL and can also be synthesized to be used in an FPGA device. When synthesized in an FPGA, the core offers a good combination of moderate FPGA space consumption and excellent performance. The core can reach up to 200 MHz / 400 Mips in consumer type Cyclone FPGA, and up to 400 MHz / 800 Mips in enterprise type FPGA. Clock by clock the core performs very good and scores in many benchmarks better than several ColdFire, ARM and PowerPC cores on a clock by clock comparison.

Last edited by meet.mrnrg on 19-Feb-2015 at 10:03 PM.

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@meet.mrnrg

Where is MiniMig2 this core would be a killer for MiniMig2

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@g01df1sh

Quote:

Where is MiniMig2 this core would be a killer for MiniMig2

A new standalone system is in the pipe.
But before this CPU cards for A500/A1200/A4000 etc will come out.

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@BigGun

Great News any ideas on time scale before a1200 version will be ready for public.

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Elbox empty Power Tower
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Wii with Amiga emulation
Vampire v4 SA

@g01df1sh

A minimig 2 using dual FPGAs combining and rationalising the original minimig design with the Viper 600 design would be relatively simple to do and build and should not add much at all to the cost of a minimig. You are just replacing the 68000 with a second FPGA and adding a chip for some fast ram. I don't think you'd need the level translators from Vampire. You'd need to modify the microcontroller (ARM instead of PIC) firmware and circuitry to load a CPU core to the second ("Vampire") FPGA and it would be best to load the kickstart into fast ram instead of slow ram then you've got 2MB of chip ram available to the chipset FPGA.

@IanP

How much would it cost for a 2nd core, a 2nd core that can actually house a AA+ chipset or AAA+ chipset ???

https://www.youtube.com/watch?v=OXR8OMU8W10

Last edited by meet.mrnrg on 22-Feb-2015 at 07:00 AM.

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Quote:

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@meet.mrnrg,

Hmm, maybe SMP for OS4.2 can be compiled for 68k. We see.

@QuikSanz: there's no chance to have SMP on AmigaOS4, unless you want to break the compatibility (which will not happen).

Only the Amiga o.s. version 3.x or AROS/68K can have a chance with a proper 68K FPGA project. Also AROS x86/x64 can have a chance (but it requires some work).

@QuikSanz

I see the apollo core is only integer.
On os4 will be needed fpu and mmu

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@tlosm

Quote:

On os4 will be needed fpu and mmu

MMU yes, FPU - not that much required. As WinUAE has realy slow PowerPC FPU emulation, I see how many applications are FPU dependent. Most applications/games work fast, exceptions are games like Quake (40 FPS in 320x200) and probably video playback (this could be also because of slower GFX).

@tlosm

Quote:

I see the apollo core is only integer. On os4 will be needed fpu and mmu

No this is not correct.

Apollo has an 68k-FPU roughly as fast as an 68060 @ 300 Mhz.

Apollo also has an MMU.

But the Vampire600 Card uses a small FPGA which limits the features that are enabled in it.

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@BigGun
Are no bigger fpga's available? I am not sure if thinking in terms of cost reduction is really needed in our elite luxus classic hobby.

I would not care if I need to pay 50€ more.
I doubt anyone else would care either.

Edit:
I am interested in a a1200 version with rtg. And yes I would buy also a version with a slower fpga.
Could the fpga sit on a daughter board ?

Last edited by phoenixkonsole on 22-Feb-2015 at 10:13 AM.

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@meet.mrnrg

The cost would likely depend on the additional features beyond AGA you wanted in the chipset. I'm no expert on the core sizes for the various amiga chipsets and 68K softcores that have been created so far but it's been said that the AGA + TG68 takes up about 60% (40% + 20%) of the Spartan 3 on the FPGA Arcade Replay and there is an AGA + TG68 version for the Cyclone 3 on the MiST. Something like a hi-res true colour mode wouldn't require much logic in theory and an RTG mode is planned for the replay. The people that have worked on those cores and biggun and his team for the SAGA + phoenix would have much more idea about the FPGA requirements than I do.

@phoenixkonsole

The Apollo team are currently working on a version for the A500, A1000 and A2000 that uses an off the shelf development board with a large FPGA that connects to an interface to connect to the 68K socket. Versions for the A1200, A3000, A4000 and a standalone system are also planned.

@IanP

I know..

post #3 from Gunnar
http://amigaworld.net/modules/newbb/viewtopic.php?topic_id=39935&forum=25#752276

I just wan't to say that a few € saving should not be the reason to produce a "half baked solution". As far as I know this "small FPGA" statement applies to the a600 version only(?)

Of course if you drive it for business and do compete with others a few € savings can matter.

But in that case... they are out of competition if things are running stable.
So from a user POV I wold more likely pay for a more expensive fpga than to pay less and see some month later a new and better product..

Just my 2 cents.
But anyway I am impressed and see a bright future for FPGA powered "real" Amigas : )

Thanks Gunnar and Team.
I came a bit late to the party and need to read more about... in case I am talking around already known facts, please excuse me.

Last edited by phoenixkonsole on 22-Feb-2015 at 12:16 PM.
Last edited by phoenixkonsole on 22-Feb-2015 at 12:15 PM.

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@IanP

Quote:

a standalone system are also planned

I for one would buy one, been trying to get an A1200 or A600 and ones in nice condition and unmodified seem to fetch pretty high prices now. Wish I had kept mine.

A standalone Apollo with enhanced AGA, RTG modes, maybe an MPEG decoder, USB and SATA ports would be really nice. All on a compact and standard form factor like Mini-ITX.

@cdimauro

Quote:

cdimauro wrote: @QuikSanz: there's no chance to have SMP on AmigaOS4, unless you want to break the compatibility (which will not happen). Only the Amiga o.s. version 3.x or AROS/68K can have a chance with a proper 68K FPGA project. Also AROS x86/x64 can have a chance (but it requires some work).

We have heard that before, it is yet to be seen so I will wait and have a good laugh if that is wrong.

@phoenixkonsole

Yes the "small FPGA" applies to the A600 version only. AFAIK Igor Majstorovic set out to make the Vampire 600 as a proof of concept that a cheap FPGA could act as an accelerator in an existing Amiga. The FPGA chosen for the task was perfectly fine for 68K softcores available at that time but work that had started for the Natami project on an advanced softcore had progressed to the point that it was ready to find a home in Amiga hardware. Igor got together with the Apollo team but their softcore was too big for his existing card so they cut it down to fit then tuned it up to get the best out of what was available.

There is no suggestion that future cards from the Apollo team will have the limitations of the Vampire 600 but with FPGAs the more you pay the more you can get in terms of speed, size, IO and extras like embedded hardcore processors and peripherals but the price ramps up exponentially.

@QuikSanz

Quote:

QuikSanz wrote: @cdimauro Quote: cdimauro wrote: @QuikSanz: there's no chance to have SMP on AmigaOS4, unless you want to break the compatibility (which will not happen). Only the Amiga o.s. version 3.x or AROS/68K can have a chance with a proper 68K FPGA project. Also AROS x86/x64 can have a chance (but it requires some work). We have heard that before, it is yet to be seen so I will wait and have a good laugh if that is wrong.

PowerPC CPUs do NOT support locking memory accesses at the byte level (only at the word/32-bit level). The Amiga o.s., OS4 included, as some sensible structures which manage task and interrupts, and they are... byte-sized.

A 68K platform implemented as FPGA can have fully control such kind of accesses, so it's pretty easy to implement an SMP system.

Last but not least, x86 and x64 have:
- byte-level locks;
- guaranteed writes for byte access;
- debugger registers to intercept some byte-level accesses;
- the last processors have HARDWARE support for memory transactions.
Especially the last feature (which will become very common) is very promising to solve many problems that currently kill performance due to locks contentions.

So, it's my turn to laugh now...

@cdimauro

Quote:

A 68K platform implemented as FPGA can have fully control such kind of accesses, so it's pretty easy to implement an SMP system.

With Amiga-like OS?

We'll see.