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      /  News about Vampire and Apollo
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PosterThread
Srtest 
Re: News about Vampire and Apollo
Posted on 5-Dec-2016 4:25:49
#781 ]
Member
Joined: 15-Nov-2016
Posts: 79
From: Israel, Haderah

@OlafS25

Actually I think I get it really well. If you stop for a second from dividing Amigaland between classic and modern (I don't refer to the X1k and the X5k as NG but CurrentG) you will see a genuine attraction to both and perhaps from the same people - for different reason. My questions about the fpga project are actually different than what had come up here. I'm more interested in the ability of recreating the chips from a non-technical standpoint.

I think for example the fpga project should make 720p its end goal. What is a X1k without RadeonHD? without compositing and using more of the gpu? now, of course I recognize the limits of past protocols and rtg but I also think about a version for classic. Who knows, a driver which uses a fast uvd might eventually won't need a very strong cpu. I'm not saying it is in an immediate future just a goal if there is one to set as an endgame in modernizing the classics.

________

Your pick of benchmarks are always very selective: a current test of a browser between current pcs and current AmigaOnes.

You can instead test the pc I'm using for games which is a 8-9 years old pc with a new gpu. It runs games at max or almost max quality for most of the time. So in 8-9 years there wasn't much of a progress there if my old quad pc (one of the firsts which were quads) can keep up really well with a newer corei whatever. And then, if Odyssey, not a maintained browser and without javascript jit can plow through javascript facebook like its nothing, than what is the benchmark? if I get in one second from the top of the screen to the next page on the facebook feed then what is better? half a second? I guess but it's not much of a real benchmark. A real one might be that on the same X1k in linux with 2 cores working, FF 50 is slower than Odyssey with one core on AOS. It's real it just doesn't say very much like most of your proposed benchmarks.

You see? who knows what works well and what doesn't work. If AOS4.1FE runs it smooth without even needing a second core then what would happen when that second core is enabled? and then maybe some will get a quad eventually for whatever needs it on Amigaland and maybe even at distant future it won't be about that at all.

________

The biggest contradiction is you talking about a compatibility of classic software with classic machines while also saying how current Amiga software is not modern and lacks a lot of necessary features. So what is it? more compatible or with less features? on the X1k we have emulation for that which does pretty well with jit from a technical perspective.

Last edited by Srtest on 05-Dec-2016 at 07:10 AM.

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utri007 
Re: News about Vampire and Apollo
Posted on 5-Dec-2016 5:49:45
#782 ]
Cult Member
Joined: 12-Aug-2003
Posts: 883
From: United States of Europe

@OlafS25

I do understand why people want to buy Vampire. My comment was that there is no competition against NG hardware. Comparing Vampire to any PPC board is pointless.

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QuikSanz 
Re: News about Vampire and Apollo
Posted on 5-Dec-2016 6:35:39
#783 ]
Super Member
Joined: 28-Mar-2003
Posts: 1000
From: Surf City - Huntington Beach, Ca.

@Srtest,

Exactly! Vampire is "Classic" and will not be anything but 68k. But it is the fastest you'll ever drive for the foreseeable future. PPC on the other hand is a whole different animal, brute force.

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Overflow 
Re: News about Vampire and Apollo
Posted on 5-Dec-2016 6:37:43
#784 ]
Super Member
Joined: 12-Jun-2012
Posts: 1236
From: Norway

Its a pointless discussion.

I like to think the Vampire might spill over both software and potential PPC customers.
A vibrant Amiga community is good for all branches, regardless of flavour. I do realise some will disagree with that notion, as they will argue it splits up the developer talent, slowing down each branch. But at the end of the day, people in retro communities are doing what they do out of fun/challenge, so again, getting all worked up over it is pointless.
Take a good chunk of the democoders; they show no intrest in both Vampire and PPC, altho I got the impression it depends a little on the development of the core;

"That being said, a compatible 68060/AGA core that matches the timing of existing real hardware would be something interesting."

http://ada.untergrund.net/?p=boardthread&id=1008&page=last#l

Summary; Enjoy what you have, and to hell with any naysayers.

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QuikSanz 
Re: News about Vampire and Apollo
Posted on 5-Dec-2016 6:46:59
#785 ]
Super Member
Joined: 28-Mar-2003
Posts: 1000
From: Surf City - Huntington Beach, Ca.

@Overflow,

Yes, a comparison is an effort in futility.

I did wonder if Buster could be handled by the Vampire with some cable to speed the Z2 bus up a bit but, dream mode off...

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Karlos 
Re: News about Vampire and Apollo
Posted on 5-Dec-2016 15:33:20
#786 ]
Super Member
Joined: 24-Aug-2003
Posts: 1923
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

Come on guys, where is the A1200 version? Any 68K compatible faster than 060 for the A1200 will sell like hotcakes.

_________________
IBrowse/AWeb user? amiga.org - classic browser edition

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wawa 
Re: News about Vampire and Apollo
Posted on 5-Dec-2016 18:10:35
#787 ]
Elite Member
Joined: 21-Jan-2008
Posts: 5570
From: Unknown

@Karlos

let them do first things first. first generation 68000 based accels share much in common, as they simply attach to a 68000 bus afair. a1200 will need some redesign, a3/4k even more if they ever surface.

i dont currently have a "vampire compatible" machine, but no hurry. im happy for those who have and may be served right away.

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Shiryu 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 10:37:34
#788 ]
Member
Joined: 5-Dec-2016
Posts: 15
From: Unknown

@Seiya

After trolling on Italian sites and failing you decided to try international trolling? Really, I can't understand why you started this "crusade" against all possible solutions involving classic hardware claiming how WinUAE is better, free and blah blah blah. Honestly, I didn't realized until now that you're not against hardware, you're not against Amiga, you're just against freedom of expression obliterating and spitting on other people's passions and hobbies and pretending to be the keeper of absolute truth. And please, try to learn english, because it's "humiliate" not "umiliate". Oh, maybe you can say you were joking by adding a simple ":P". Truth is, you are not joking.. If I can suggest you, try to find a less destructive and more constructive hobby than spitting on good people's work. You are smart enough to do it but I realize that destroying is easier than building, right? You see the FPGAs solutions as threatens to WinUAE? Why? Nobody ever claimed that. They are just a way to have power on classic hardware without spending thousands of bucks for an obsolete accelerator. What you said? WinUAE is free? Yes, but what if I wanna use my good ol' Amiga in place of a cold, impersonal PC and I just have a small budget? Damn it... can't you really understand how futile is your crusade? Or maybe you just love to make people angry.. Yeah, again, destroying is easier than building.

Last edited by Shiryu on 06-Dec-2016 at 10:48 AM.
Last edited by Shiryu on 06-Dec-2016 at 10:46 AM.

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terminills 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 11:04:52
#789 ]
Super Member
Joined: 8-Mar-2003
Posts: 1221
From: Unknown

@Srtest

Quote:
if Odyssey, not a maintained browser



How is Odyssey not maintained? Unless you're specifically talking about the AOS4 version in which case please state that.

_________________
Support AROS sponsor a developer.

"AROS is prolly illegal ~ Evert Carton" intentionally quoted out of context for dramatic effect

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pavlor 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 16:12:19
#790 ]
Elite Member
Joined: 10-Jul-2005
Posts: 8164
From: Unknown

@terminills

OS4 version had some update last year based on AROS port (memory leak thing, I think).

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pavlor 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 16:23:17
#791 ]
Elite Member
Joined: 10-Jul-2005
Posts: 8164
From: Unknown

@Shiryu

Seiya´s opinion may look offensive to some, but his comparison to other products is valid. I agree that repeating the very same obvious statement again and again is tiresome...


And of course...

Welcome!

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Shiryu 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 18:00:56
#792 ]
Member
Joined: 5-Dec-2016
Posts: 15
From: Unknown

@pavlor


Much obliged, pal. As for me, I think that "VS" topics are useless like pairing oranges and apples.

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Srtest 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 18:26:12
#793 ]
Member
Joined: 15-Nov-2016
Posts: 79
From: Israel, Haderah

I would put my config as a signature if I knew how. I thought the one in the profile was gonna show up on my comments.

So yes, everything is based on A1-X1000 + AOS4.1FE (with some complementary LXQt on Linux), while 68k is based on e-uae jit. I hardly use Petunia.

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Overflow 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 18:52:12
#794 ]
Super Member
Joined: 12-Jun-2012
Posts: 1236
From: Norway

http://forum.apollo-accelerators.com/viewtopic.php?f=10&t=25

Depending on available time, I've got the intent on outlining in this thread what the SIMD extensions to the Apollo Core offer and how the functionality might apply to the one or other coding problem. Please be aware that the extensions are a work in progress and might change without notice before an official release of a finished core (working title: Gold2).

AMMX, as Gunnar named it, is a 64 Bit SIMD extension. Apart from the fact that it shares the 64 Bit width with the MMX of a well known company, the concept we followed is more geared towards the SIMD extensions in RISC architectures (AltiVEC, Wireless MMX). In the current state of development, 32 registers are available for SIMD usage. These 32 registers include the well-known D0-D7 (extended to 64 Bit) and 24 new registers which are SIMD exclusive. This way, a lot of work can be done in registers, reducing the strain on memory reads and writes considerably.

Most instructions follow a 3 operand logic D=A op B, where the results of the operation between A and B is stored in any C of the registers. It must be noted at this point that the input operand A doesn't have to be a register. Any effective address in 68k notatation is allowed, including immediates. Allow me to show some examples at this point.

PADDW D0,D1,D2 ; 4x16 Bit addition D0+D1=D2
PADDW (A0),D1,D2 ; same, from memory (unaligned)
PADDW #$8100810081008100,D1,D2 ; add 4x16 Bit constant
PADDW.W #$8100,D1,D2 ; same as above, with implicit splat

The latter two code lines above demonstrate a convenient feature in AMMX. You can specify immediates also in SIMD code, something you don't find easily somewhere else. The constants can be given in full 64 Bit. While this may be useful for some applications, the 64 Bit immediates result in instruction words of 12 Bytes. As an alternative, we added a second way of specifiying constants. The .w Syntax in the last of the example mnemonics triggers the implicit distribution of the immediate data word to all four 16 Bit slots. This way, the latter two instructions are identical in their arithmetic operation. The difference with implicit splat is a reduction of the instruction word to 6 Bytes.

These two concepts of 3 operand logic and immediates can help to save a number of move instructions that were common to 68k code.

In terms of data movement, two basic operations are supported: LOAD and STORE. While input data for the operations can be gathered by the for one of the operands in the arithmetic operations, the destination is a register in the majority of instructions. Therefore, movement to memory needs to be done by STORE. Example:

LOAD (A0)+,D1 ;D1=64 bit from any memory location, A0=A0+8
PAVGB (A1)+,D1,D1 ;8x unsigned byte average (a+b+1)>>1
STORE D1,(A2)+ ;write result


A special case of STORE is also provided, one that can selectively write the individual bytes. The STOREM Rn,Rm, will only write bytes of which the corresponding mask bit is set (both in MSB to LSB notation).

moveq #4,d3 ;yes yes, this will stall in the following calculation
LOAD 4(A0,D3.l*4),D1 ;D1=64 bit from any memory location
moveq #%01010101,D2 ;D2.b=bit mask which bytes (bit=1) are to be written
STOREM D1,D2,(A2)+ ;write every second byte from D1


The third special STORE variant is targeted at 8 Bit pixel data. Typical operations in image/video processing result in intermediate results exceeding the 8 Bit range, which implies clipping before going back to 8 Bit. The Apollo features its own interpretation of PACKUSWB for this purpose. Clipping is done to (0,255). Example:

LOAD (A0)+,D1 ;4 signed words: a0.w a1.w a2.w a3.w
LOAD (A1)+,D2 ;4 signed words: b0.w b1.w b2.w b3.w
PACKUSWB D1,D2,(A2)+ ;8 unsigned bytes: a0 a1 a2 a3 b0 b1 b2 b3
; operation: vn.b = ( vn.w < 0 ) ? 0 : ( ( vn.w > 255 ) ? 255 : vn.w ); // n=0...7


One catch with SIMD is that you can not always guarantee that you are able to layout your data as needed by the arithmetics. That's why coders have been fond of the permute instruction, introduced with Morotola's PPC7400 (aka G4) series. The Apollo core offers one, too. Two input registers Ra and Rb can be permuted by a given permutation constant into the destionation Rd. Example:

;byte permutation key semantics for Rm,Rn
; Rm m0 m1 m2 m3 m4 m5 m6 m7 = 0 1 2 3 4 5 6 7
; Rn n0 n1 n2 n3 n4 n5 n6 n7 = 8 9 a b c d e f
;
; ex1: word interleaving
LOAD (A0)+,D1 ;4 signed words: m0.w m1.w m2.w m3.w
LOAD (A1)+,D2 ;4 signed words: n0.w n1.w n2.w n3.w
VPERM #$018923ab,D1,D2,D3 ;D3: m0.w n0.w m1.w n1.w
; ex2: unsigned byte to words
LOAD (A0),D4 ;8 unsigned bytes m0 m1 m2 m3 m4 m5 m6 m7
moveq #0,d5 ;0.l
VPERM #$F0F1F2F3,D4,D5,D6 ; first four bytes as words m0.w m1.w m2.w m3.w
VPERM #$F4F5F6F7,D4,D5,D6 ; second four bytes as words m4.w m5.w m6.w m7.w


Let's come to arithmetics. Bit-wise operations are:
Code: Select all
PAND ,Rb,Rd
POR ,Rb,Rd
PEOR ,Rb,Rd
PANDN ,Rb,Rd


Addition/Subtraction can be done on 8 Bit or 16 Bit.

PADDB ,Rb,Rd ;Rd = Rb +
PADDW ,Rb,Rd ;
PSUBB ,Rb,Rd ;Rd = Rb -
PSUBW ,Rb,Rd ;


One special case of add/sub is the BFLYW. A common recurrence in signal transforms (FFT,DCT,DWT) is the butterfly, an operation where the result of an addition and subtraction of two operands is required. In order to augment such transforms, the AMMX offers BFLYW ,Rb,Rd:Rd+1. Please note that the destination register is actually a consecutive pair (with an even index for the first one).

BFLYW D0,D1,D2:D3 ; D2 = D1 + D0 , D3 = D1 - D0 (4 words each)

As a side note, we replaced 28 add+sub combinations by butterflies in an 8x8 iDCT, roughly 15% of the total instructions in that function block..

Multiplies are currently offered by the PMUL88 ,Rb,Rd instruction. It multiplies four words with the given operand and shifts down by 8 Bits after the multiply (Rd = (Rb*)>>8 ). Example:

PMUL88.W #16,D0,D1 ; D1 = (D0*16)>>8 = D0/16
PMUL88.W #1024,D0,D1 ; D1 = (D1*1024)>>8 = D0*4
PMUL88.W D2,D3,D4 ;

The multiply is implemented with full throughput. With the implemented logic (>>8), it can serve as short range shift replacement.

Last edited by Overflow on 06-Dec-2016 at 06:52 PM.

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Karlos 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 19:02:17
#795 ]
Super Member
Joined: 24-Aug-2003
Posts: 1923
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@Overflow

Interesting. What is the reasoning for making the SIMD registers a superset of the original D0-7? Would it not have been cleaner and simpler to implement the SIMD as an entirely new unit with its own 64-bit registers?

_________________
IBrowse/AWeb user? amiga.org - classic browser edition

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pavlor 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 19:17:39
#796 ]
Elite Member
Joined: 10-Jul-2005
Posts: 8164
From: Unknown

@Srtest

Quote:
while 68k is based on e-uae jit. I hardly use Petunia.


Interesting, I still use many 68k applications via built-in emulation. Even my title-bar clock is 68k.

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wawa 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 19:18:34
#797 ]
Elite Member
Joined: 21-Jan-2008
Posts: 5570
From: Unknown

@Karlos

i think you wont get your answers here, especially the above has only been reposed from elsewhere. id suggest to either ask them on their irc or on their forum:

http://apollo-core.com/knowledge.php

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IanP 
Re: News about Vampire and Apollo
Posted on 6-Dec-2016 20:31:20
#798 ]
Member
Joined: 27-Mar-2008
Posts: 54
From: Unknown

@Karlos

I would assume including the extended D registers in the AMMX unit allows for easier integration with the rest of the CPU units to combine their operations with those of AMMX and also is more efficient in terms of FPGA resources.

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gregthecanuck 
Re: News about Vampire and Apollo
Posted on 7-Dec-2016 2:31:25
#799 ]
Cult Member
Joined: 30-Dec-2003
Posts: 738
From: Vancouver, Canada

@Karlos

I'm confused. The info above notes "... and 24 new registers which are SIMD exclusive".

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Samurai_Crow 
Re: News about Vampire and Apollo
Posted on 7-Dec-2016 11:40:52
#800 ]
Elite Member
Joined: 18-Jan-2003
Posts: 2052
From: Ft. Collins, Colorado, USA

@Karlos

Quote:

Karlos wrote:
@Overflow

Interesting. What is the reasoning for making the SIMD registers a superset of the original D0-7? Would it not have been cleaner and simpler to implement the SIMD as an entirely new unit with its own 64-bit registers?


Having to shove the vector contents out to memory and read them back in to data registers would have slowed down the programs written using AMMX.

_________________
Member of Apollo Accelerator team.

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