@_Steve_
I remember reading this article origionally, and was puxzzled about certain things, like the complex feedback loops. People are getting that used to not having to know about designs in 8 bit systems with a few bytes of code, that they are suprised when evolutionary systems rediscover it for themselves?
How much ultra dense and compact code is hidden away in 40 year old NDAd manuals that have been destroyed through licencing restrictions etc?
As for the circuit. To distinguish between two tones with a digital system, the first thing you use is a gating counter. That is, a gate that opens for a given number of counts after a trigger event. Very old tech. If it counts a pulse, an arbitary number of counts, then another pulse will either be ten times that count, or a tenth that count, for this operation, Use teh value 4, for less gates.
To generate the free running clock, personally, for reliability, stability, duplication etc, I would use an n bit PRBS, LFSR or whatever the name is these days to repatent it, with 0,n taps, followed by an m bit counter, count from 0 to n. A 64 stage bucket brigade followd by a 6 bit counter will give you a divide by 2^64 in very few gates. Follow that by a 2 bit counter, with the hard limit gating input ADC used in th ZX spectrum, a single schnmidt gate, and you have a method of measuting times between zero crossings.
Do you know what teh simplest method of selecting between the vocal input Stop, Go? Go has a single impulse at teh beginning, then decays away. StoP Has Two impulse bursts a given fraction of time apart, multiples of teh impulse width. He might have found out that by saying Dock, or Church would have done the same.
I havent even tried doing n dimentional circutry arrangements yet, given this design is all in linear, even though Ive been trying to think of all teh differnet ways a pentagram arangement of logic, neurons, could filter signals, from 1 to 5 step delays.
The Rowhammer attack method shows the so called isolated free running circuit to be more widespread than first thought, and Im wondering how to describe the stochastic chaotic oscilator that such interactions seem to imply. Given it also uses a couple of gates in a loop, folowed by a counter, in another loop.
What we really need now is FPGAs with NRAM, that can be partially reprogrammed while in circuit and running, so that two parts of the given chip can then reprogram the other in run time, true dynamic adaptive reconfiguration.
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