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/  Forum Index
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      /  Amiga Inc. Loses U.S. Trademarks
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PosterThread
Cheese 
Re: Cloanto acquire Amiga Inc Trademark
Posted on 22-Apr-2021 22:23:36
#1 ]
Regular Member
Joined: 23-Oct-2006
Posts: 314
From: Unknown

@ppcamiga1

_________________
x86/MorphOS 4.0

"Delving into the past can be a dangerous exercise." -hyperionmp

"I've been a supporter of "REACTION" GUI because is an Amiga OS thing." -Snuffy

"I personally prefer a vision of do'ers and makers rather than

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PosterThread
michalsc 
Re: Cloanto acquire Amiga Inc Trademark
Posted on 22-Apr-2021 17:50:56
#1 ]
AROS Core Developer
Joined: 14-Jun-2005
Posts: 377
From: Germany

@ppcamiga1

Quote:
It is simple. gcc that compile code in C files to little endian and at the same time data in the same C files to big endian not exists.


You are replying to a post in which I have just shown how to compile for big endian aarch32 target. Few posts later I have just shown how to compile for big endian aarch64 target. In gcc manual, section with ARM specific option, one reads that there is a switch to either compile for big endian or little endian targets.

Quote:
On ARM in big endian mode code is still little endian.


Sure, but it does not matter.

Quote:
If someone patch hundreds of megabyte of code gcc and rest of tools to made proper gcc.
gcc that compile code in C files to little endian and at the same time data in the same C files to big endian.
Which means never.


Well, if I look at gnu tools, all ARM big endian modes (which means old be32 and new be8 for 32-bit architectures as well as big endian for aarch64 architecture) are supported as far as I was checking. Your "never" seems to happened probably in last century already.



To summarise. I show you gcc and binutils compiling and generating arm big endian files. You say it does not exist. I show you that the generated binary contains LE code and BE data, you say it will never happen, even if I show you this:



There, one clearly sees that the CPU instructions remain in LE byte order no matter what compile flags are set, but data is set to either BE or LE, depending on compiler flags. Exactly the case which, according to you, will never happen.

I even compile your own example with ARM toolchain and I show you the flags necessary to generate ARM big endian version of it - you say such gcc does not exist.



This leads me to a conclusion that either
a) you have absolutely no idea what you are talking about, or
b) you are just trolling.

Emu68 project, a JIT engine which translates m68k code to AArch32 or AArch64 code and executing it, uses ARM in big endian mode. But probably you will just say that it does not exist or is impossible, although everyone can follow it on GitHub, download sources or nightly builds.

Last edited by michalsc on 22-Apr-2021 at 06:05 PM.
Last edited by michalsc on 22-Apr-2021 at 05:58 PM.
Last edited by michalsc on 22-Apr-2021 at 05:56 PM.

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