@TheDaddy

Quote:

TheDaddy wrote: A bit off topic but... is the XMOS chip an off the shelf part? If so how much does it cost? And can't it be put on a PCI card for the SAM?

It is. IIRC it costs around 8 US$. A devkit for usb is obtainable for less than 40 EUR.
google.de shopping drops me this:
http://www.lipoly.de/index.php?main_page=product_info&products_id=104166

Last edited by Zylesea on 25-Feb-2010 at 08:00 PM.

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will the question be the same in 2- 3 years with faster, 16 core chips available cheap ?

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@Zylesea

>>It is. IIRC it costs around 8 US$. A devkit for usb is obtainable for less than 40 EUR.
google.de shopping drops me this:
http://www.lipoly.de/index.php?main_page=product_info&products_id=104166


Interesting, I wonder if you can make something for the SAM, via USB or PCI...

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@TheDaddy

Quote:

Interesting, I wonder if you can make something for the SAM, via USB or PCI...

Usually USB developer kits are created to mainly for experimentation and chip programming, rather than "using as an accelerator for host", and usually the aim (for developer kit, and such chips in general) is to produce harware that will work without the computer

Of course the developer kit won't do much good, as long as there's no PPC version of the software available.

Last edited by Jupp3 on 26-Feb-2010 at 01:19 PM.
Last edited by Jupp3 on 26-Feb-2010 at 01:16 PM.

@TheDaddy

Quote:

Interesting, I wonder if you can make something for the SAM, via USB or PCI...

You don't need to make it, you can buy it and plug it in every Sam Flex, Amiga1, µA1, Pegasos, Pegasos-II, Mac or PC.

I doesn't know if the XMOS is programmed and connected via I2C, the SoC used on Efika or Sam440 have a I2C bus, you can attach a lot of I/O devices to that bus, and maybe the XMOS Chip is attached to the dual core PPC on the X1000 in the same, way.

Update Documentation says SPI.

Last edited by Arko on 26-Feb-2010 at 04:43 PM.
Last edited by Arko on 26-Feb-2010 at 01:38 PM.

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I borrowed this comments from here (#27 & #28):
http://amigaworld.net/modules/newbb/viewtopic.php?topic_id=38873&forum=2&start=20&order=0

That's the idea of XMOS they are SUPPOSED to run outside the main computer. You program them and the used them for whatever task you have planned. They run robots, they do all sorts of cool things, but they don't really add any value by being hooked to a computer, they are a computer. Program them and set them free!

Quote:

Jupp3 wrote: @TheDaddy Quote: Interesting, I wonder if you can make something for the SAM, via USB or PCI... Usually USB developer kits are created to mainly for experimentation and chip programming, rather than "using as an accelerator for host", and usually the aim (for developer kit, and such chips in general) is to produce harware that will work without the computer Of course the developer kit won't do much good, as long as there's no PPC version of the software available.

@Thread

For the lazy, , , like me.

http://digikey.com/Suppliers/us/XMOS.page

and select the audio file.

perhaps xena can also be run when the PPC is not running... or the system is suspended to RAM or to HDD...

Last edited by KimmoK on 26-Feb-2010 at 04:07 PM.

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@KimmoK

Quote:

perhaps xena can also be run when the PPC is not running... or the system is suspended to RAM or to HDD...

If you need to have small part of system running while "the rest is off", perhaps it would be better to use a dedicated microcontroller system for that?

@persia

Quote:

persia wrote: That's the idea of XMOS they are SUPPOSED to run outside the main computer. You program them and the used them for whatever task you have planned. They run robots, they do all sorts of cool things, but they don't really add any value by being hooked to a computer, they are a computer. Program them and set them free!

Yeah, and the AMCC 440 EP PowerPC processor is SUPPOSED to be run outside the main computer too. It's SUPPOSED to be used for "Imaging, industrial control, networking and other embedded applications."

Who cares? SAM 440 users certainly don't.

Hans

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@all

hows about a 25 Billion instructions/second board bolted onto your X1000?

The XMP-64 consists of 16 quad core G-series XMOS chips (64 processors in total) arranged in a hypercube allowing for very fast communication of data between processors (1.6 billion bits per second can flow between hypercube edges).

The XMP-64 can therefore execute 25 billion instructions per second. Some applications a device such as the XMP-64 could be used in include:

Image processing, Audio processing, Synthesizing, Communications, Packet inspection etc.

https://www.xmos.com/products/development-kits/xmp-64


A snip at US$1500

Last edited by ddni on 26-Feb-2010 at 09:12 PM.

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@ddni

Quote:

ddni wrote: @all hows about a 25 Billion instructions/second board bolted onto your X1000? The XMP-64 consists of 16 quad core G-series XMOS chips (64 processors in total) arranged in a hypercube allowing for very fast communication of data between processors (1.6 billion bits per second can flow between hypercube edges).

How did they do that? A hypercube requires more than 3 spatial dimensions :p

Quote:

The XMP-64 can therefore execute 25 billion instructions per second. Some applications a device such as the XMP-64 could be used in include: Image processing, Audio processing, Synthesizing, Communications, Packet inspection etc. https://www.xmos.com/products/development-kits/xmp-64 A snip at US$1500

Or for a fraction of the price, you can get a GTX260 and have:

Quote:

karlos@Megaburken-II:~/NVIDIA_CUDA_SDK/bin/linux/release$ ./deviceQuery There is 1 device supporting CUDA Device 0: "GeForce GTX 260" Major revision number: 1 Minor revision number: 3 Total amount of global memory: 938803200 bytes Number of multiprocessors: 24 Number of cores: 192 Total amount of constant memory: 65536 bytes Total amount of shared memory per block: 16384 bytes Total number of registers available per block: 16384 Warp size: 32 Maximum number of threads per block: 512 Maximum sizes of each dimension of a block: 512 x 512 x 64 Maximum sizes of each dimension of a grid: 65535 x 65535 x 1 Maximum memory pitch: 262144 bytes Texture alignment: 256 bytes Clock rate: 1.36 GHz Concurrent copy and execution: Yes karlos@Megaburken-II:~/NVIDIA_CUDA_SDK/bin/linux/release$ ./bandwidthTest Running on...... device 0:GeForce GTX 260 Quick Mode Host to Device Bandwidth for Pageable memory . Transfer Size (Bytes) Bandwidth(MB/s) 33554432 2995.5 Quick Mode Device to Host Bandwidth for Pageable memory . Transfer Size (Bytes) Bandwidth(MB/s) 33554432 2251.2 Quick Mode Device to Device Bandwidth . Transfer Size (Bytes) Bandwidth(MB/s) 33554432 105055.8

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@Karlos

Quote:

Or for a fraction of the price, you can get a GTX260 and have:

.. which is all very nice if your problem can be easily vectorized. Not so nice if there are large number of interdependencies between different parts of your data.

Very different computational models for very different type of applications.

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@persia

Quote:

persia wrote: That's the idea of XMOS they are SUPPOSED to run outside the main computer. You program them and the used them for whatever task you have planned. They run robots, they do all sorts of cool things, but they don't really add any value by being hooked to a computer, they are a computer. Program them and set them free!

People, perhaps we should wait until more info is available before
worrying about how Xena will be used or programmed. Perhaps several
different cards will be needed depending on what functions we want.

We don't know for example what else Xorro contains. Looks like there
is room for at least one PCIe 1x slot, but that's just a guess.

Certainly if somebody designs a single or multi function card the necessary
programming will be there.

It just seems that trying to think in terms only of what Xena 'can do' is
limiting/obscuring a larger view.

@Mechanic,

From what I've read the Xorro slot is a PCIe x8 inline with the other PCIe x1 you mentioned.

Chris

Last edited by QuikSanz on 27-Feb-2010 at 12:38 AM.

@QuikSanz

eh, no. Xorro uses the same connector as PCIe x8, and is inline with a PCIe x1 connector.

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@olegil

I guess what I was trying to say is that Xorro has a lot more pins than
necessary for Xena and we don't yet know how/if they are used.

If you have some knowledge about this, then it is your duty to come forth
and 'Spill the Beans'. Pleading ignorance won't work.

Er ,, ,, ,, well ,, ,, ,, uh,, ,, hmmm.

@olegil,

So your saying Xorro is the same connector but not a real PCIe x8 ? I guess we'll see.

Chris

@Mechanic,

Reading thru some Xcore stuff it's also likely that the JTAG connector is also part of it. That would make a large total of connections.

Chris

@QuikSanz

Quote:

Reading thru some Xcore stuff it's also likely that the JTAG connector is also part of it. That would make a large total of connections.

Yeah, it would. It just 'seems' to me JTAG would more likely be connected
to the MB. Either thru a local bus or even a dedicated USB. Also the power/GND
pins could be MB connected. So even though Xena has 64 pins they're not
necessarily all in the 8x slot.

If this is wrong please correct me.

8x = 98 pins
1x = 36 pins
XS1-L1 = 64 pins

If only 2 XS1 pins are not connected to Xorro then;

8x - 62 = 36 which = 1x. So it's possible(if I'm right).

Wish we knew more. Ah, well. Where's them pancakes?

Last edited by Mechanic on 27-Feb-2010 at 05:54 PM.