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      /  Does AOS4 support ALTIVEC?
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Treke 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 7:10:53
#41 ]
Regular Member
Joined: 17-Mar-2003
Posts: 137
From: EU

@CodeSmith

Hi.
Yes that kind of optimisation can be applied:
-If the previous task, in previous slice, used, the Altivec registers, then store them, if it didn't, don't store it has them already stored
-But restoring, has to be done allways, when task has already used the altivec registers. _next_ task needs them. How will the scheduler know before context switch, that the _next_ task _will_ use altivec registers ? It cannot. Its undeterministic.
Also all 'normal' registers are restored before context switch, not only those that will be used

... hmm, talking a lot, bye, (not only Friedens have loads of work )...

re

Treke

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CodeSmith 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 8:19:08
#42 ]
Elite Member
Joined: 8-Mar-2003
Posts: 3045
From: USA

@Treke

No, no. It's like this. Say that we first start up the system and run four tasks, A, B, C and D. A and C use altivec, B and D do not. There is also a variable, called last_altivec, that starts out pointing at nothing, and which will point to the task that last accessed the altivec unit of the CPU. This is what happens during the first few timeslices:

1. Task A is the first one to get the CPU. It does some stuff, then runs an altivec instruction. This causes the interrupt EntilZha mentioned to be triggered. The last_altivec variable is not pointing at any task, so we simply set it to point to the current task (task A) and resume normal processing.
2. The multitasking timer runs down, and task A loses the CPU. The scheduler picks task B to run.
3. Task B runs for its alloted timeslice, not doing any altivec work. During the whole time the altivec registers carry the values they last had when task A was running. Task B does not use altivec, so it doesn't care.
4. The multitasking timer runs down, and task B loses the CPU. The scheduler picks task C to run.
5. Task C runs a few regular instructions, and eventually executes an altivec instruction. This triggers the interrupt. This time the last_altivec variable is pointing at something (task A), so we save the altivec registers (which, since task B did not use altivec, still have the values they last had when task A lost the CPU) in a space reserved for task A (each task has such a block of memory reserved for this purpose), and load these registers with the contents of the similar area for this task (task C). This is the first time the altivec registers are restored for task C, so they will contain zeros or garbage, depending on how the memory was initialized. We then set last_altivec to point to task C, and task C resumes processing normally.
6. The multitasking timer runs down, and task C loses the CPU. The scheduler picks task D to run.
7. Task D runs for its alloted timeslice, not doing any altivec work. During the whole time the altivec registers carry the values they last had when task C was running. Task D does not use altivec, so it doesn't care.
8. The multitasking timer runs down, and task D loses the CPU. The scheduler picks task A to run.
9. Task A does some processing, then executes an altivec instruction. This causes the interrupt to get triggered. The interrupt handler looks at the last_altivec variable, which is pointing to task C. The altivec registers are therefore saved in the special area for task C. If you recall, the altivec registers will still have the values they held at the time task C lost the CPU, because task D did not touch the altivec unit. Next, the altivec registers will be loaded with the values in the memory area for task A (they were put there by the interrupt handler when task C triggered it, see step 5, so after loading, the altivec registers will have the values they had just before task A last lost the CPU) and the last_altivec variable is set to point to task A. Task A resumes processing.
10. The multitasking timer runs down, and task A loses the CPU. The scheduler picks task B to run.

...and so on. As you can see, the scheme delays saving and restoring of altivec registers until the last instant, with the net effect being that the only work that gets done is as much as is strictly needed. Things are a bit messy (eg the altivec registers have values they strictly speaking should not during the timeslices for tasks B and D), but since no-one's looking no-one really cares This is a technique that is pretty commonly used in optimization, and it's called, for obvious reasons, lazy processing or lazy evaluation.

So, to summarize: you don't need to look at the future, just set things up so you don't have to. Sortof like a stage magician, who uses clever scams to make it seem like he's doing impossible things

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EntilZha 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 11:01:20
#43 ]
OS4 Core Developer
Joined: 27-Aug-2003
Posts: 1679
From: The Jedi Academy, Yavin 4

@ssolie

Quote:
Personally, I like XP's advice in this kind of situation. The AltiVec feature is important but the effort to tune it now may not be worth it as it affects a very small set of programs at the moment (1 by my count). Besides, you can always improve it in a later iteration (e.g. BoingBag, 4.1) if need be.


That's what I meant: I don't know if all the hassle is worth the effort...

Quote:
Besides, there are much more important features to worry about *cough* SNAP *cough* in my opinion.


SNAP porting is in full swing, but naturally, not by me That's the good thing about having a big team. I currently exclusively focus on exec resp. kernel related issues.

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"I don't have a frigging clue. I'm norwegian" -- Ole-Egil

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vortexau 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 11:01:46
#44 ]
Elite Member
Joined: 10-Mar-2003
Posts: 2651
From: . . outside the Pod-bay; Australia

Are all of these ideas different from

how Apple uses AltiVec?
Quote:

Notes About Optimization

Most applications will see dramatic performance gains by optimizing only a small number of key functions. It is usually not productive, and sometimes counter-productive to optimize everything. This is because often only a small handful of functions are responsible for the vast majority of the CPU time used by your application. Optimizing code that is never or rarely executed wastes your time and frequently results in larger functions that needlessly take up more system resources. The good news is that this means that just a little bit of work applied to the right functions will likely result in large improvements in overall speed.



Of course, there must be some differences between pre-OSX, and post OSX, as Multitasking wasn't correctly implimented prior to X!

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EntilZha 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 11:05:52
#45 ]
OS4 Core Developer
Joined: 27-Aug-2003
Posts: 1679
From: The Jedi Academy, Yavin 4

@CodeSmith

Quote:
My algorithm is different - it is adaptive. Instead of looking at "uses altivec" for the lifetime of the task (this is "no" until the first time Altivec is used, and then it is "yes" from them on)


Remember that there's a dedicated register (vrsave) that stores the registers invovled. When the task finishes using altive registers, vrsave will be 0, and no further Altivec context will be switched...

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Bobsonsirjonny 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 13:01:03
#46 ]
Elite Member
Joined: 28-Jul-2003
Posts: 2880
From: Unknown

@EntilZha

My head now hurts - I got lost somewhere after the second page of the this topic..If its a vector engine is that like a built in graphics pre-processor?

Karlos was showing me how to code in C a while back but he's currently really busy. I know what a function is, and what a class is, and how you gotta call em all at the start, and they are all parented etc.. and I did the standard "hello world" but have since got forgotten.
So I'm gonna get a good book on C. Can anyone recommend one?

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BrianK 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 13:46:43
#47 ]
Elite Member
Joined: 30-Sep-2003
Posts: 8111
From: Minneapolis, MN, USA

@vortexau

Quote:

Of course, there must be some differences between pre-OSX, and post OSX, as Multitasking wasn't correctly implimented prior to X!


Some differences? Major underlying differences. Switching The Mac OS to the Mach kernel with a BSD amalgam was the major factor in X. This added true multitasking, better multitreading, and better multiple CPU support.

Here's some history of Mach and Apple. http://www.stepwise.com/Articles/Technical/MeetMach.html

Something to scare you all? Rick Rashid was the main person behind Mach he's been working at Microsoft for at least 10 years. The microkernel in WinNT and XP is based upon his work using a microkernel very similar to Mach. http://www.microsoft.com/presspass/exec/rick/default.asp



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Bobsonsirjonny 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 15:29:33
#48 ]
Elite Member
Joined: 28-Jul-2003
Posts: 2880
From: Unknown

@BrianK

Huh? How??? I mean...

M$ have something that works really well and then they turn it into XP...


Apple take it and you get OS X - which IMHO kicks arse. I hate MAC OS classic with a passion - but OS X is great.

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Karlos 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 19:54:43
#49 ]
Elite Member
Joined: 24-Aug-2003
Posts: 2020
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@Bobsonsirjonny

Quote:
My head now hurts - I got lost somewhere after the second page of the this topic..If its a vector engine is that like a built in graphics pre-processor?


'lo bob,

Altivec (also known as Velocity Engine etc.) is a form of SIMD (single instruction multiple data) added to the powerpc to speed up certian types of tasks. You can think of it as being a similar technology to MMX or 3DNow. It's handy for computationally repetetive tasks such as AV streaming, 3D calculations etc. since it can apply the same operation simultaneously to several sets of data, thus acheiving a degree of parallel processing.

The altivec unit is an add on to the CPU, much like a FPU is. Your software has to be written in order to take advantage of it, just like software needs to be written to take advantage of your FPU etc.

Quote:

Karlos was showing me how to code in C a while back but he's currently really busy. I know what a function is, and what a class is


Sorry about that. If you know functions, half of C is done. Classes are for C++, but if you know structures and functions from C, classes are pretty easy to comprehend.

Quote:

So I'm gonna get a good book on C. Can anyone recommend one?


Actually GadgetMaster found some cool videos and stuff for introducing C. I'll have to ask him about it

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Stilgar 
Re: Does AOS4 support ALTIVEC?
Posted on 14-May-2004 22:22:40
#50 ]
Regular Member
Joined: 7-Nov-2003
Posts: 152
From: Unknown

RE: C books

Try

A Book on C, Kelley,Pohl, Published by Addison Welsley

I have an unfortunate problem with programming language books that I never get past the fourth chapter, but up until there it was pretty good.

The standard text is of course The C Programming language, by Kernighan and Richie, but its not as friendly, you probably need some coding background.

I also had a book C by Example, but I seem to have lost that one, maybe at work, but maybe it means that it's a crap book.

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CodeSmith 
Re: Does AOS4 support ALTIVEC?
Posted on 15-May-2004 2:01:58
#51 ]
Elite Member
Joined: 8-Mar-2003
Posts: 3045
From: USA

@EntilZha

Ah, this is something I didn't know - on the x86, FPU/MMX registrers are loaded and saved to main memory. This is obviously a lot slower than shifting registers around inside the CPU. How many sets of Altivec registers can be saved that way?

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moebius 
Re: Does AOS4 support ALTIVEC?
Posted on 15-May-2004 2:21:38
#52 ]
Member
Joined: 26-Jul-2003
Posts: 29
From: Courtenay, BC

@EntilZha

Quote:

EntilZha wrote:

Another item on my Todo list: Thermal management. The PPC can watch the temperature, and if it's too high, it can generate an interrupt. The handler can then use the instruction fetch throttling to slow down (and cool) the CPU...


But isn't there one fundamental problem with this idea? Motorola says that the thermal sensor is unreliable and therefore is unsupported. That says to me that you cannot rely on what it says (and my own observations of the absurd indications that were given by the original cpu in my A1 (7451?) and by the replacement 7455 when using Ross V's 2.4.19 kernel (which had that option enabled). One day that I recall, it told me that my cpu was running at 65 Degrees Celsius, yet the cpu was cool to the touch. The heat dissipation capabilities of PowerPC processors are most definitely *not* that good.

My current arrangement with external sensors hooked to a fan controller isn't the most accurate, but it is leap years ahead of depending on that unreliable internal sensor data.

That still being true, how can you be planning anything to do with thermal management?



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EntilZha 
Re: Does AOS4 support ALTIVEC?
Posted on 16-May-2004 10:10:03
#53 ]
OS4 Core Developer
Joined: 27-Aug-2003
Posts: 1679
From: The Jedi Academy, Yavin 4

@CodeSmith

Quote:
Ah, this is something I didn't know - on the x86, FPU/MMX registrers are loaded and saved to main memory. This is obviously a lot slower than shifting registers around inside the CPU. How many sets of Altivec registers can be saved that way?


No no, the registers are still saved to memory, but the vrsave register contains one bit for each vector register in use, so you only store registers that are in use. If none are in use anymore, none are saved/restored...

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"I don't have a frigging clue. I'm norwegian" -- Ole-Egil

All opinions expressed are my own and do not necessarily represent those of Hyperion Entertainment

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EntilZha 
Re: Does AOS4 support ALTIVEC?
Posted on 16-May-2004 10:13:20
#54 ]
OS4 Core Developer
Joined: 27-Aug-2003
Posts: 1679
From: The Jedi Academy, Yavin 4

@moebius

Quote:
That still being true, how can you be planning anything to do with thermal management?


AFAIK, the thermal sensors on newr CPUs (750FX, 7455) is pretty reliable. At least it can give an indication on the temperature...

Honestly, if there wasn't any sense in the thermal sensores, WTF are they implemented on each of the newer CPUs ? Chip are is valuable, why waste it with something unsupported ?

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"I don't have a frigging clue. I'm norwegian" -- Ole-Egil

All opinions expressed are my own and do not necessarily represent those of Hyperion Entertainment

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CodeSmith 
Re: Does AOS4 support ALTIVEC?
Posted on 16-May-2004 10:24:40
#55 ]
Elite Member
Joined: 8-Mar-2003
Posts: 3045
From: USA

@EntilZha

Ah, that's quite cool. Dirty bits for registers, huh. Neat

On the x86 there is a pair of instructions you use for this (fsave/frestore or the fnsave/fnrestore variants), but they process the entire FPU state. I'm pretty sure there's no way of knowing which registers got touched so one can optimize this.

The PPC sounds like a very interesting chip indeed, I'm looking forward to getting to know it better

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Hammer 
Re: Does AOS4 support ALTIVEC?
Posted on 16-May-2004 10:52:54
#56 ]
Elite Member
Joined: 9-Mar-2003
Posts: 4254
From: Australia

@CodeSmith

Quote:

CodeSmith wrote:
@EntilZha

Ah, this is something I didn't know - on the x86, FPU/MMX registrers are loaded and saved to main memory. This is obviously a lot slower than shifting registers around inside the CPU. How many sets of Altivec registers can be saved that way?

Note that there?s the register renaming scheme (transparent to the programmer) to address the said performance issue.

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CodeSmith 
Re: Does AOS4 support ALTIVEC?
Posted on 16-May-2004 11:29:04
#57 ]
Elite Member
Joined: 8-Mar-2003
Posts: 3045
From: USA

@Hammer

That's true for something like mov eax, edx or fadd. Fsave and frestore need to hit main memory, with the usual performance hits. Even if the stuff's in cache it is a performance hit - those 128 bytes tend to become a hole in your L1 cache because since they are the same across all tasks (assuming the kernel is mapped to the same linear addresses for all tasks), cache policies that rely on locality of reference (ie most of them) will see these bytes as being "important" and so they will not often get flushed.

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EntilZha 
Re: Does AOS4 support ALTIVEC?
Posted on 16-May-2004 11:50:10
#58 ]
OS4 Core Developer
Joined: 27-Aug-2003
Posts: 1679
From: The Jedi Academy, Yavin 4

@Hammer

Quote:
Note that there?s the register renaming scheme (transparent to the programmer) to address the said performance issue.


Register renaming is very common on modern CPUs. All PowerPC implement this as well.

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"I don't have a frigging clue. I'm norwegian" -- Ole-Egil

All opinions expressed are my own and do not necessarily represent those of Hyperion Entertainment

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Hammer 
Re: Does AOS4 support ALTIVEC?
Posted on 16-May-2004 12:47:00
#59 ]
Elite Member
Joined: 9-Mar-2003
Posts: 4254
From: Australia

@CodeSmith

What about prefetch predictions schemes?

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Karlos 
Re: Does AOS4 support ALTIVEC?
Posted on 16-May-2004 13:06:07
#60 ]
Elite Member
Joined: 24-Aug-2003
Posts: 2020
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@EntilZha

Quote:
No no, the registers are still saved to memory, but the vrsave register contains one bit for each vector register in use, so you only store registers that are in use. If none are in use anymore, none are saved/restored...


Is there a similar mechanism for the IU / FPU register set? It seems a very obvious optimisation in hindsight

Doesn't the 68882/68040/68060 FPU have a similar mehcanism for the FPU registers? IIRC it wasn't an automatic "dirty bit", but you could tell it which registers your code has actually modified so that backing up registers could be optimised. Or did I just imagine it?

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