|
 |
Team Member
 |
Joined: 13-Mar-2003
Posts: 4261
From: Unknown | | |
|
| From here.
Posted by Hammer on 25-Jan-2008 13:10:33.
@BigGun
Quote:
I can think of two demanding examples:
a) A Vector Game using Mip-mapped/Antialiased texture mapped pixels with ALPHA and antialising with calculated lighting. Such a game needs to color combine four read pixels into one written pixel.
|
Looks like a 3D pipeline.
Refer to 'Pixomatic Software Renderer 3' i.e. software 3D render for X86 CPUs and it's used in UT2004.
http://www.radgametools.com/pixomain.htm
http://www.radgametools.com/pixofeat.htm
It's tested with 3D games like Medal of Honor, Backyard Baseball 2005, Backyard Hockey, Backyard Skateboarding and 'etc'.
Quote:
This means wide buses or prefetching does not help and the speed is fully latency bound.
|
In unified shader architecture, the 3D stages usually loops near the shader domain.
http://www.nvidia.com/object/IO_37100.html
Refer to Page 29. Figure 13.
Massive hardware threading engine is important in high performance unified shader architecture (e.g. G80, R600) i.e. they act as place holders for instructions and data as it cycles through the 3D pipeline stages.
It would inefficient to use a typical CPU arch for pure pixel pushing work.
Last edited by Zardoz on 25-Jan-2008 at 01:46 PM.
_________________
|
|
22 crawler(s) on-line.
95 guest(s) on-line.
0 member(s) on-line.
Zardoz 
