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MEGA_RJ_MICAL 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 17-May-2022 5:31:34
#61 ]
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From: AMIGAWORLD.NET WAS ORIGINALLY FOUNDED BY DAVID DOYLE

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Karlos 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 17-May-2022 8:08:55
#62 ]
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Joined: 24-Aug-2003
Posts: 2478
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

Quote:
You don't need to map all AVX (your ISA doesn't have this constraint. Only mine has it, because it's a x86/x64 superset): it's enough to provide the most important vector instructions


Is there a working implementation of your machine ? Is it interpretive or does it use a JIT? I'm curious to test it out.

Quote:
BTW you already have even more sometimes, with ASIN, ACOS, etc. instructions


Indeed. The first extension set provides a while bunch of maths library and other operations. The main reason for this is to avoid having to rely on host function calls for them since the number of calls is limited.

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tygre 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 17-May-2022 17:30:05
#63 ]
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Joined: 23-Mar-2011
Posts: 266
From: Montreal, QC, Canada

Hi @Karlos!

Quote:

Karlos wrote:
@tygre

It's a good question. My personal opinion is that Emulators form a distinct subset of Virtual Machines. That is to say, they replicate the behaviour of some existing (usually physical hardware) system. The term Virtual Machine also covers examples of machines that are not emulators and are just pure software state machine / interpreters. For example, the runtime for many languages like Java, JavaScript, PHP, Python, etc.


Thank you, that reads like a good definition (and distinction) of the two...

Now, I wish WinUAE (or any UAE) would call themselves Virtual Machines because it sounds so much more serious, like VMWare

Cheers!

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cdimauro 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 17-May-2022 17:42:31
#64 ]
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Joined: 29-Oct-2012
Posts: 2482
From: Germany

@Karlos

Quote:

Karlos wrote:
@cdimauro

Quote:
You don't need to map all AVX (your ISA doesn't have this constraint. Only mine has it, because it's a x86/x64 superset): it's enough to provide the most important vector instructions


Is there a working implementation of your machine ? Is it interpretive or does it use a JIT? I'm curious to test it out.

No, nothing right now, because I had different goals.

I've written a tool to disassemble x86/x64 binaries & reassemble them using the instructions of my architecture. The tool has also a peephole optimizer, checking specific instructions patterns and replacing them with a single instruction on my ISA (which supports Mem-to-Mem, 64-bit immediates, pre/post de/increment addressing modes, ternary instructions, special instructions for functions' prologues/epilogues, etc.).

It was useful to get some statistics with real code, because I needed a benchmark to check how good or worse was my architecture compared to the leading one. And also to take some decisions on how to evolve it (I reached the 9th version in around 10 years. But now I've really stopped, because I reached a good maturity).

I've also written an executive summary and some slides (yet to be completed) for potential investors.

The next step (apart completing the presentation) will be to write a back-end for LLVM. This will allow to better exploit the peculiarity of the ISA, squeezing more in terms of both code density and number of executed instructions (which should lower: my ISA needs less instructions compared to x86/x64 to do the same work), and at end having the possibility to directly compare entire applications (now I can only have a partial comparison, because I only have a small subset of the total instructions found in the binaries. Plus, there is a lot of redundant data which is stored in the data section, since my ISA allows to define immediates for all memory instructions, included FP and vectors. This also eliminates some load instructions) with the competitors.

In short, a virtual machine is currently out of scope: it'll be the last thing to do, after the above backend.
Quote:
Quote:
BTW you already have even more sometimes, with ASIN, ACOS, etc. instructions


Indeed. The first extension set provides a while bunch of maths library and other operations. The main reason for this is to avoid having to rely on host function calls for them since the number of calls is limited.

That's ok for the purpose of your ISA, which has specific requirements.

They are a bit too much if you want to define a general purpose architecture. But this isn't your current goal.

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kolla 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 17-May-2022 21:59:01
#65 ]
Elite Member
Joined: 21-Aug-2003
Posts: 2088
From: Trondheim, Norway

@tygre

You know, MicroSoft’s hypervisor and foundation for their cloud services, Hyper-V, started as a PC emulator originally made for PPC MacOS, named VirtualPC, which they had bought from a company called Connectix. If I recall correctly, some emulated “legacy” devices, are even today the same as the original, like the rather odd choice of a 100Mbit NIC by DEC.

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tygre 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 17-May-2022 22:15:37
#66 ]
Regular Member
Joined: 23-Mar-2011
Posts: 266
From: Montreal, QC, Canada

Hi @kolla!

Quote:

kolla wrote:
@tygre

You know, MicroSoft’s hypervisor and foundation for their cloud services, Hyper-V, started as a PC emulator originally made for PPC MacOS, named VirtualPC, which they had bought from a company called Connectix. If I recall correctly, some emulated “legacy” devices, are even today the same as the original, like the rather odd choice of a 100Mbit NIC by DEC.


I didn't know, very interesting! Thanks!

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Karlos 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 18-May-2022 10:18:10
#67 ]
Elite Member
Joined: 24-Aug-2003
Posts: 2478
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

Quote:

cdimauro wrote:
@Karlos

Quote:

Karlos wrote:
@cdimauro

s there a working implementation of your machine ? Is it interpretive or does it use a JIT? I'm curious to test it out.

No, nothing right now, because I had different goals.

...

It was useful to get some statistics with real code, because I needed a benchmark to check how good or worse was my architecture compared to the leading one. And also to take some decisions on how to evolve it (I reached the 9th version in around 10 years. But now I've really stopped, because I reached a good maturity).

I've also written an executive summary and some slides (yet to be completed) for potential investors.


Interesting. Is the plan for an ISA to run in silicon directly then? Or is it for a universal binary distribution to be executable on a range of architectures?

Quote:
The next step (apart completing the presentation) will be to write a back-end for LLVM. This will allow to better exploit the peculiarity of the ISA, squeezing more in terms of both code density and number of executed instructions (which should lower: my ISA needs less instructions compared to x86/x64 to do the same work), and at end having the possibility to directly compare entire applications (now I can only have a partial comparison, because I only have a small subset of the total instructions found in the binaries. Plus, there is a lot of redundant data which is stored in the data section, since my ISA allows to define immediates for all memory instructions, included FP and vectors. This also eliminates some load instructions) with the competitors.


Do you think there is a scope for a new ISA these days? Between x64, ARM and RISC-V and, I suppose, WebAssembly, it seems like all the important market segments are sewn up.

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QBit 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 18-May-2022 13:09:48
#68 ]
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Joined: 15-Jun-2018
Posts: 202
From: Unknown

@all
Virtusl machines can only emulate something that exists! The Chance of WinUAE is bringing virtual Machines beyond and creating a machine that never existed! By Software only!

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Karlos 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 18-May-2022 13:23:02
#69 ]
Elite Member
Joined: 24-Aug-2003
Posts: 2478
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@QBit

Quote:
Virtual machines can only emulate something that exists!


Please clarify "exists" in the context of this statement. A virtual machine does not have to be an emulator of some other physical machine. I can (and have, more than once) design a machine and implement it in software.

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QBit 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 18-May-2022 13:33:30
#70 ]
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Joined: 15-Jun-2018
Posts: 202
From: Unknown

@Karlos

Normal virtual machines rely on "existing" Hardware Designs! I found out in WinUAE that you can create Configurations that never existed and that is the Chance of WinUAE. Bringing Virtual Machines beyond and creating the Idea of bringing 68k to another still not existing level which can run on any existing Hardware possible!

WinUAE is a virtual Machine where everything is possible. Going Compatible and going incompatible ways! Everything is freely configurable you can create any kind of Configuration like an A 500 with 68060 for example. So why not go beyound and adding your virtual 64 Bit 68k Design.

That was what I wanted to clarify !

Last edited by QBit on 18-May-2022 at 01:41 PM.
Last edited by QBit on 18-May-2022 at 01:40 PM.

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Karlos 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 18-May-2022 14:11:03
#71 ]
Elite Member
Joined: 24-Aug-2003
Posts: 2478
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@QBit

Quote:
Normal virtual machines rely on "existing" Hardware Designs.


At the risk of being a pedant, since clarity is important, there's no such thing as a "normal" virtual machine. If there was a definition it would probably be "a machine implemented in software".

What you are describing here is a hardware emulator and/or simulator. These are a distinct subset of virtual machines.

Once you have a hardware emulation/simulation of an existing physical machine, you can of course begin to reconfigure and extend it in ways that go beyond the original hardware capabilities.

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cdimauro 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 18-May-2022 20:17:27
#72 ]
Elite Member
Joined: 29-Oct-2012
Posts: 2482
From: Germany

@Karlos

Quote:

Karlos wrote:
@cdimauro

Quote:

cdimauro wrote:
It was useful to get some statistics with real code, because I needed a benchmark to check how good or worse was my architecture compared to the leading one. And also to take some decisions on how to evolve it (I reached the 9th version in around 10 years. But now I've really stopped, because I reached a good maturity).

I've also written an executive summary and some slides (yet to be completed) for potential investors.


Interesting. Is the plan for an ISA to run in silicon directly then?

This is my goal/dream, since I think that it can compete quite well with the existing ISAs.
Quote:
Or is it for a universal binary distribution to be executable on a range of architectures?

No, it's a regular ISA, like the mainstream ones. So, targetting from the embedded to the HPC markets.
Quote:
Quote:
The next step (apart completing the presentation) will be to write a back-end for LLVM. This will allow to better exploit the peculiarity of the ISA, squeezing more in terms of both code density and number of executed instructions (which should lower: my ISA needs less instructions compared to x86/x64 to do the same work), and at end having the possibility to directly compare entire applications (now I can only have a partial comparison, because I only have a small subset of the total instructions found in the binaries. Plus, there is a lot of redundant data which is stored in the data section, since my ISA allows to define immediates for all memory instructions, included FP and vectors. This also eliminates some load instructions) with the competitors.


Do you think there is a scope for a new ISA these days? Between x64, ARM and RISC-V and, I suppose, WebAssembly, it seems like all the important market segments are sewn up.

Yes, but new ISAs are showing up, from time to time, despite the architectures market is consolidated. Think about RISC-V, which was born on 2011 (same for the first version of my ISA), and which now is a direct competitor of ARM (primarily) and x86/x64.
But there are companies which propose new ISAs, in particular in the embedded market. Or there are old ISAs, like SuperH, which were reborn and actively developed (Super as J Core now).

Of course, introducing a new architecture is difficult, and it's very very hard to get some success (which means: at least have a small but stable market), if not even just arriving to the market. This is more or less what Jean-Louis Gassée (former Be Inc. CEO/founder) told me when I've approached him several years ago, as venture capitalist. That's because there's no software available neither support, and having them requires extraordinary efforts.

However this is also the reason why I've decided to make my ISA 100% x86/x64 assembly compatible: to make it way easier porting existing software and toolchains.

This is a key advantage compared to other ISAs, and it's the same reason that gave success to 8086: it was almost source-level compatibile with the 8085, which was a successful processor for Intel. 99% of 8085 software was portable to 8086 via a basic translator (and this instantly gave to 8086 a huge library).

Naturally this very strict relationship with x86/x64 had some disadvantages as well (I had several constraints to fulfill), but overall the balance/outcome is very good. I also have to say that having so many constraints to deal with was a big challenge that forced me to think to novel and interesting solutions for my ISA, which at the very end payed-off (especially from a personal PoV, since I gained experience and knowledge).

Finally and regarding WebAssembly, it isn't a regular ISA: it was developed only as universal binary distribution. In fact, it looks like many other ISAs/VMs for languages (dynamic, in particular) that use an IL when they execute code.
And, despite their claims, the code density is poor and it's not fast (and it's not even portable: little endian is a requirement); unless you compare it with JavaScript. I think that (as for Rust), Mozilla didn't designed a good ISA: it could have been much better in terms of code density and performances.
Anyway, it isn't a competitor for my ISA.

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Karlos 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 19-May-2022 12:25:48
#73 ]
Elite Member
Joined: 24-Aug-2003
Posts: 2478
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

Quote:

cdimauro wrote:
@Karlos


Quote:
Do you think there is a scope for a new ISA these days? Between x64, ARM and RISC-V and, I suppose, WebAssembly, it seems like all the important market segments are sewn up.

Yes, but new ISAs are showing up, from time to time, despite the architectures market is consolidated. Think about RISC-V, which was born on 2011 (same for the first version of my ISA), and which now is a direct competitor of ARM (primarily) and x86/x64.


I regard RISC-V as a special case, primarily because it's open and therefore not subject to horrendously expensive licensing. Pretty much anyone can use it for anything.

Quote:
Of course, introducing a new architecture is difficult, and it's very very hard to get some success (which means: at least have a small but stable market), if not even just arriving to the market. This is more or less what Jean-Louis Gassée (former Be Inc. CEO/founder) told me when I've approached him several years ago, as venture capitalist. That's because there's no software available neither support, and having them requires extraordinary efforts.

However this is also the reason why I've decided to make my ISA 100% x86/x64 assembly compatible: to make it way easier porting existing software and toolchains.


Will it rely on being able to port code written for x86/x64, even when the original high level sources are unavailable, by being able to dissassemble / reassemble? Or is it mostly binary compatible with a few differences / enhancements ?

What's the incentive to use the new ISA? It seems to me, if it's 99% source compatible with x64, while that makes changing from x64 easier, it's also more reason not to bother unless the 1% contains some real magic or there are other significant benefits like lower power etc. Except that actually depends on the physical implementation more than the ISA.

Quote:
Naturally this very strict relationship with x86/x64 had some disadvantages as well (I had several constraints to fulfill), but overall the balance/outcome is very good. I also have to say that having so many constraints to deal with was a big challenge that forced me to think to novel and interesting solutions for my ISA, which at the very end payed-off (especially from a personal PoV, since I gained experience and knowledge).


It sounds really interesting from a personal education perspective but also a David v Goliath scenario for actual commercialisation.

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cdimauro 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 19-May-2022 18:18:23
#74 ]
Elite Member
Joined: 29-Oct-2012
Posts: 2482
From: Germany

@Karlos

Quote:

Karlos wrote:
@cdimauro

Quote:

cdimauro wrote:

Yes, but new ISAs are showing up, from time to time, despite the architectures market is consolidated. Think about RISC-V, which was born on 2011 (same for the first version of my ISA), and which now is a direct competitor of ARM (primarily) and x86/x64.


I regard RISC-V as a special case, primarily because it's open and therefore not subject to horrendously expensive licensing. Pretty much anyone can use it for anything.

Yes, but other architectures were open source / without advantages, so companies could have picked them and used. However they had very limited scope (only for embedded, for example) or not good for some specific tasks.

RISC-V succeeded because it was designed to be good for all markets plus it's open source. And, not less important, was backed by universities and people which work or worked in this area.
Quote:
Quote:
Of course, introducing a new architecture is difficult, and it's very very hard to get some success (which means: at least have a small but stable market), if not even just arriving to the market. This is more or less what Jean-Louis Gassée (former Be Inc. CEO/founder) told me when I've approached him several years ago, as venture capitalist. That's because there's no software available neither support, and having them requires extraordinary efforts.

However this is also the reason why I've decided to make my ISA 100% x86/x64 assembly compatible: to make it way easier porting existing software and toolchains.


Will it rely on being able to port code written for x86/x64, even when the original high level sources are unavailable, by being able to dissassemble / reassemble?

It also relies on that, but not only.
Quote:
Or is it mostly binary compatible with a few differences / enhancements ?

No, it's totally binary incompatible with x86/x64. The opcodes structure (plus some internals) are completely different, and it's the reason why the code density is better than them and less executed instructions are needed to accomplish the same tasks.

My ISA is a x86/x64 superset not only because it has more instructions (only a few of them, anyway, but I think that they important), but has completely new addressing modes and several other novel features which makes it way better those ISAs.
Quote:
What's the incentive to use the new ISA?

- better code density -> less pressure on the memory hierarchy -> less power consumption and/or better performances and/or smaller chip area;
- less executed instructions -> better code density (then see above) and/or better performances;
- greatly simplified decoder (WAY better than x86/x64). The opcodes are structured in a way that only the first bits (the first 8 bits are enough to decode almost 90% of the opcode space and related instructions. So, the vast majority of instructions) are needed to decode the most important information for the instruction (its length. If it references memory, and in case where the memory extension is positioned in the opcode stream. If the memory extension has displacement, then how long is it and where it's positioned. Finally, if the instruction has an immediate, then how long is it and where it's positioned). A simplified decoder makes it much easier to be implemented -> smaller chip area -> (MUCH) less power consumption; plus, fewer pipeline stages are required -> better performances;
- big opcode space for additional instructions (especially for the SIMD/Vector ones);
- symmetrical ISA. Almost all GP instructions work on 8/16/32/64 bit. All SIMD/Vector instructions (besides the very specialized ones, like for hashing, encryption, etc.) work on either scaler o packed vectors, integer of floating point, 8/16/32/64 ints or 16/32/64/128 FPs. It makes the life much easier to both compilers and assembly coders;
- since it's a superCISC (super because several extensions are added which aren't found on other ISAs), it provides a lot of benefits to performances which are especially more visible with low-end chips. The poorer are the microarchitectures, the better the CISC has advantages.
Quote:
It seems to me, if it's 99% source compatible with x64, while that makes changing from x64 easier, it's also more reason not to bother unless the 1% contains some real magic or there are other significant benefits like lower power etc.

Actually it's 100% source compatible (but of course only if there's no direct/embedded reference to x86/x64 binary), but this is only for making the life easier to developers (which usually they just require a simple recompilation to get a binary for the new ISA).

Other than that, there are many enhancements and news things (I haven't listed all of them) which bring the benefits which I've roughly listed above.
Quote:
Except that actually depends on the physical implementation more than the ISA.

Well, the ISA influences also the physical implementations AKA microarchitectures. In fact, I've explicitly designed mine in order to have a super simplified decoder compared to other CISCs, and to better compete with RISCs.
Quote:
Quote:
Naturally this very strict relationship with x86/x64 had some disadvantages as well (I had several constraints to fulfill), but overall the balance/outcome is very good. I also have to say that having so many constraints to deal with was a big challenge that forced me to think to novel and interesting solutions for my ISA, which at the very end payed-off (especially from a personal PoV, since I gained experience and knowledge).


It sounds really interesting from a personal education perspective but also a David v Goliath scenario for actual commercialisation.

I'm fully aware of that, so I have no illusions, and I know that it can be left forever on my drawer.

But I still want to try. The american dream...

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kolla 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 19-May-2022 18:46:05
#75 ]
Elite Member
Joined: 21-Aug-2003
Posts: 2088
From: Trondheim, Norway

@QBit

Quote:

QBit wrote:
@Karlos

Normal virtual machines rely on "existing" Hardware Designs!



Not sure if those quotes work as intended for you there :)

Most virtual machines - the ones you can buy/rent at AWS, Linode, Digital Ocean, Vultr, Upcloud etc - never existed as hardware. That's also why the Linux kernel (and others) is full of virtio drivers, drivers streamlined for virtual hardware that never existed.

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Karlos 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 20-May-2022 14:34:25
#76 ]
Elite Member
Joined: 24-Aug-2003
Posts: 2478
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

Quote:

cdimauro wrote:
@Karlos

It should be enough for the second version of you ISA. You already changed several things, and you still have left some "open doors".


Due to the massive nerd-snipe, I've reworked scalar integer division. Instead of having separate opcodes per operation size, un/signed and division/modulus, there is now a single integer division opcode. This uses 2 16-bit words. The second word encodes the data type/size, operation class (division, modulus or division+modulus) and the resulting quotient/remainder output registers, which are allowed to be (but not required to be) different from the initial source/destination. So for one opcode slot, we get 24 different operations, 8 of which are new.

Obviously this is a more complex instruction to decode (for an interpreter) than it was, but I figure it's a reasonable trade off given the relative infrequency of integer division.

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cdimauro 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 20-May-2022 17:43:43
#77 ]
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Joined: 29-Oct-2012
Posts: 2482
From: Germany

@Karlos: that's a good trade-off. Divisions and modulos are rare, but still used, and can make the difference in performances. Using just one opcode slot is "cheap".

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Karlos 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 20-May-2022 18:30:18
#78 ]
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Joined: 24-Aug-2003
Posts: 2478
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

Yeah. Writing it up is one thing, but soon I'm going to have to implement it. I'll probably start with a clean slate repo and keep the existing version for posterity.

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Hypex 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 28-May-2022 13:05:00
#79 ]
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Joined: 6-May-2007
Posts: 10571
From: Greensborough, Australia

@Karlos

Quote:
I meant the hunk format used by classic AmigaOS, extended to include the metadata. Then I remembered after posting that extended hunk format already existed. It's what WarpOS used, IIRC.


Yeah that thing. I looked into that and didn't think it was extended in the best way since it obviously wasn't designed to be. Though I don't know all the history. Examining the hunk numbers they begin at 1000 so all have a decimal basis. But EHF interprets them as hex and adds $100 to numbers. It looks fine as hex but my issue is the numbers are in decimal so it doesn't exactly add up.

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MEGA_RJ_MICAL 
Re: Virtual machines, instruction sets, that sort of thing...
Posted on 28-May-2022 13:11:39
#80 ]
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Joined: 13-Dec-2019
Posts: 845
From: AMIGAWORLD.NET WAS ORIGINALLY FOUNDED BY DAVID DOYLE

PADDING!!!!!

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I HAVE ABS OF STEEL
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CAN YOU SEE ME? CAN YOU HEAR ME? OK FOR WORK

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