minator Quote:

Anyway, here's what might actually be possible without spending millions. There's a free microcoded 68K available so that might provide a route around the different instructions on different processors.

The 68k CPU instruction differences are not much of a problem with a 68000 and 68060 with the most common missing instructions and functionality brought back. The 68060.library would still function for any remaining missing support but would not be called for the support added back much like an option in WinUAE that works in a similar way.

minator Quote:

I'd build a singe core with cache, a memory controller and an I/O interface. I'd do the actual I/O on a different FPGA or CPU.

Moving the I/O to a separate FPGA would be possible if the I/O HDL was not mature but it is undesirable. Chipsets in FPGA or eFPGA blocks make more sense as supporting multiple chipsets is advantageous.

minator Quote:

It'd be on an old process, they'll be a lot cheaper to use now. Modern processes are incredibly expensive. Even at 28nm masks were $1 million and prices go up exponentially.

Multiple nations have competing chip acts subsidizing domestic chip fabrication and advancing fab processes. Prices are dropping quickly on newer processes while older processes are becoming obsolete. A 28nm process target seems reasonable and may not disappear as fast as older processes due to diminishing gains below that point.

minator Quote:

Some ASIC companies allow you to share the wafer with other designs so that'd save more money.

Good for test/prototype silicon but not for production.

minator Quote:

Going to GHz speeds is completely pointless, it would only serve to illustrate what Motorola knew in the mid 80s - 68K was a dead end. The instruction decoding is complex and slow, and the variable length means reading further into the instruction stream is incredibly difficult. At GHz speeds the CPU would spend most of it's time sitting idle waiting on memory.

We are talking about in-order 68k cores so the CPU will stall waiting for memory when the code or data is not in the cache. The 68060 8kiB instruction cache has the performance of a 32kiB classic RISC instruction cache and a 68060+ with 32kiB L1 would have the performance of a classic RISC 128kiB L1 instruction cache. The reason for this is more compressed code in the instruction cache which you ignore but it gives the 68k the advantage. Decoding on the 68060 is mostly single stage which is comparable to designs using fixed length RISC encodings. The 68k variable length encoding gives irregular decoding practically requiring a decoupled instruction fetch pipeline and instruction buffer for high performance but superscalar execution is irregular for fixed length RISC encodings and many superscaler RISC designs use the same technique to even out the variability.

minator Quote:

You might be able to use low latency memory to help here but it's not cheap, something like SRAM might work but it'd severely restrict the amount of memory possible, however on the Amiga this shouldn't be a problem. It'd get well into hundreds of MHz so well faster than any other 68K, but anything beyond this will cost vast sums.

A 68k MCU using SRAM would make one blazing fast Amiga. I like the idea of being able to turn a SoC into a MCU by remapping the SRAM caches into addressable SRAM to be used without external memory like many RISC-V SoCs.

Hammer Quote:

ColdFire V5 has 9 stages i.e. 4 stage IFP + 5 stage OEP. ColdFire V5e = optional MMU and FPU. Coldfire V5's Dhrystone 2.1 Performance is 1.83 DMIPS/MHz Coldfire V5 is missing an L2 cache for a modern memory controller. Coldfire V5 implementations in 0.13 microns with the fastest known variant in the 540 Mhz range.

ColdFire V5 was far from optimized for high clock speeds with architects preferring the advantage of being able to move to newer processes easily over optimizing for particular processes.

https://www.nxp.com/docs/en/supporting-information/RPT68KFORUM.pdf Quote:

Continuing to reap the benefits of 100% synthesizability, easily moving to new, higher performance technologies

ColdFire V5 with auto layout would likely achieve 1-2 GHz speeds using modern silicon, perhaps possible by a small team in a few months with minimal changes. At least a L2 cache would be valuable at 1-2 GHz but 500MHz with just a 32 kiB I+D cache was worthwhile. Some people here would say a 68k CPU design was impractical beyond a few hundred MHz. Caches are important for high performance but low end CPUs have limited caches so it is just as important to look at how efficiently the limited caches are used which bodes well for the 68k Amiga.

Hammer Quote:

Neo-AmigaNG PPC camp doesn't affect me since none of them follows the "Amiga 500" ideology.

Should a modern Amiga follow Commodore's Amiga 500 strategy of integrate and stagnate until costs drop or Jay Miner's aggressive integration and enhancement strategy?

@matthey

ColdFire V5 is not a 68060 since many 68K complex instructions are missing.

Intel abandoned its X86S initiative since AMD didn't support the move.
https://www.techpowerup.com/330066/intel-abandons-x86s-plans-to-focus-on-the-regular-x86-64-isa-advisory-group

Intel keeps trying to abandon 16-bit X86, e.g., the Pentium Pro's degraded 16-bit X86, which Intel reversed in the Pentium II. Itanium severely degrades IA-32.

IBM's imposing second source on Intel's X86 products is the insurance for X86 PC.

ApolloCore didn't exist in the 1990s, hence there's no insurance for 68K. No 1980s-1990s era 68K licensee developed critical skills to improve CISC CPU designs.

Both AMD and Intel founders are from Fairchild Semiconductor. Both left Fairchild Semiconductor due to imported Motorola corporate culture.

Quote:

@matthey Should a modern Amiga follow Commodore's Amiga 500 strategy of integrate and stagnate until costs drop or Jay Miner's aggressive integration and enhancement strategy?

Refer to the Raspberry Pi example and add gaming bias. Raspberry Pi covers the modern Acorn home micro concept.

In modern times, Valve's $299 Steam Deck covers the "A500" concept. Valve gained SteamOS 3.x OEM clones since Microsoft is slow on handheld GUI improvements. GUI craftsmanship matters. Microsoft is on track to losing another handheld platform, their core gaming x86 PC.

https://www.pcworld.com/article/2571541/microsoft-should-be-terrified-of-steamos.html
SteamOS 3.x is spreading beyond Valve's hardware. That could threaten Microsoft's hold on PC gaming...or even Windows' hold on the PC market.

SteamOS 3.x is based on Arch Linux with a different GUI layer and optimized hardware drivers. SteamOS 3.x install base size is similar to the Amiga's 1991.

Big ARM SoC with strong handheld iGPU comparable to AMD's APU performance and low price doesn't exist. Qualcomm's big ARM SoC with their latest handheld IGPU is usually expensive (e.g. Samsung complaints about Qualcomm SoC prices).

ApolloCore has Magie iGPU R&D and it's a long road.

Reference
https://www.yahoo.com/tech/galaxy-s25-could-suffer-higher-174037520.html
For Samsung Galaxy S25, Qualcomm's SoC price is roughly $190, a 20% price increase over last year's Snapdragon 8 Gen 3.
MediaTek's Dimensity 9400 SoC (ARM Holdings Plc's CPU and GPU IP stack) is roughly $155.

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_________________
Amiga 1200 (rev 1D1, KS 3.2, PiStorm32/RPi CM4/Emu68)
Amiga 500 (rev 6A, ECS, KS 3.2, PiStorm/RPi 4B/Emu68)
Ryzen 9 7950X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB

@ppcamiga1

Quote:

ppcamiga1 wrote: from developer pov only Amiga NC PPC follows the "Amiga 500" ideology nice fast usable graphics made on other graphics coprocessors on graphics cards

Neo-Amiga NG PPC camp doesn't follow the "Amiga 500" ideology.

Hint: Amiga 500 = "power without the price".

NVIDIA is acting like the "new SGI" and PC gamers are complaining about the new GPU prices. For bang per buck, Intel's BattleMage B580 12GB (USD249, beats RTX 4060 8GB) is attacking NVIDIA's SGI-like behavior.

AMD RX 9700 XT delivers about (est) RTX 4080-like performance for USD479, nearly half the price, similar performance. Notice Intel's and AMD's renewed under the USD500 target.

Raspberry Pi was able to reboot the Acorn home micro concept i.e. UK government education funds BBC Micro and it's repeated for Raspberry Pi.

The Amiga 500 concept adds a relatively heavy GPU solution for its time into Spectrum QL's barebone 6800x concept.

Neo-Amiga NG PPC camp followed Phase 5's the overpriced approach.

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_________________
Amiga 1200 (rev 1D1, KS 3.2, PiStorm32/RPi CM4/Emu68)
Amiga 500 (rev 6A, ECS, KS 3.2, PiStorm/RPi 4B/Emu68)
Ryzen 9 7950X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB

@Hammer
Quote:

Neo-Amiga NG PPC camp doesn't follow the "Amiga 500" ideology. Hint: Amiga 500 = "power without the price".

Oh the PegasOS I board had a price below a A500 (starting price) and the Efika was also very cheap.

@Hammer

Quote:

Raspberry Pi was able to reboot the Acorn home micro concept i.e. UK government education funds BBC Micro and it's repeated for Raspberry Pi.

It was quite the opposite of that.
The BBC micro project was part of a government project to get the UK into the computer space (as was the Transputer). I learned how to program on them at school.

However, over the years computer education went from teaching you how to program to teaching you how to use a word processor. This had the effect that there were fewer and fewer young people who could program.

A group in Cambridge decided to do something about it and decided to build a low cost computer that could be used for teaching programming. Thus was born the Raspberry Pi.

BTW My newest "Amiga" is a actually a Raspberry Pi 5.

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Whyzzat?

@minator

The Raspberry Pi Foundation receives support from UK government-funded University of Cambridge Computer Laboratory


https://www.gov.uk/government/news/tech-experts-to-provide-national-centre-for-computing-education
Date: Nov 2018

A consortium made up of STEM Learning, the British Computing Society and the Raspberry Pi Foundation, has been chosen as the provider for the project, which is backed by £84 million of government investment.



https://www.cambridgenetwork.co.uk/news/raspberry-pi-helps-set-new-national-centre-computing-education

The Raspberry Pi Foundation is part of a consortium that has secured over £78 million in UK government funding


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https://en.wikipedia.org/wiki/BBC_Micro

The BBC Microcomputer System, or BBC Micro, is a series of microcomputers designed and built by Acorn Computers Limited in the 1980s for the Computer Literacy Project of the BBC. The machine was the focus of a number of educational BBC TV programmes on computer literacy


BBC is a UK government-funded TV channel.

From 1993 to 1996, my Australian high school had an unused BBC Micro lab in which I stored my semi-roaming A3000 that was used for project presentations. My Australian high school had switch to 386DX/486 PCs and Macs during the 1990s. Our visual art room had A2000s that were replaced by color Macs 68K. Lacking 256 color display modes, the A3000 didn't replace our school's A2000s. A3000 sales flopped along with the other ECS A600.

Last edited by Hammer on 14-Jan-2025 at 05:52 AM.

_________________
Amiga 1200 (rev 1D1, KS 3.2, PiStorm32/RPi CM4/Emu68)
Amiga 500 (rev 6A, ECS, KS 3.2, PiStorm/RPi 4B/Emu68)
Ryzen 9 7950X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB

@OneTimer1

Quote:

Oh the PegasOS I board had a price below a A500 (starting price) and the Efika was also very cheap.

FYI, I'm aware of MorphOS, Efika, and Freescale MPC5200B SoC with dated PowerPC 603e (e300) CPU core with 400Mhz clock speed.

Around 2005, ARM Cortex-A8 was released with a clock speed between 0.6 GHz to 1.0 GHz and NEON SIMD support. ARM's Cortex A9 with NEON SIMD was released in 2006. Freescale still plays with the instruction set kitbashing e.g. QorIQ P1022 (e500) with non-PPC FPU and missing Altivec/VMX32.

Nintendo released its Wii game console with IBM PowerPC G3 class Broadway @ 729 MHz and custom 64bit SIMD.

The year 2005 and 2006 were IBM's 3.2 Ghz PPE with VMX128 era major design wins for Xbox 360 and PS3. Power64-based game consoles didn't benefit other PowerPC platforms. The nuke is Apple's switch from IBM PowerPC G5 to Intel Core 2.


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My point,
1. The 1987 Amiga 500's 68000 CPU selection was contemporary with the 1988 Mega Drive/Gensis's 68000, a mainstream game console.

2. In modern times, the ARM Cortex A72 (e.g. PiStorm32's RPi CM4/4B) is contemporary with Nintendo Switch's ARM Cortex A57, a mainstream game console.

Nintendo Switch 2 is rumored to have selected three ARM Cortex A78 and four A55 E-cores (replaced ARM Cortex A53).

The missing factor for modern "A500" ARM Cortex A72-to-A78 CPU selection is the fat GPU selection. Intel B580 is cheap for RTX 4060+ class power.

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_________________
Amiga 1200 (rev 1D1, KS 3.2, PiStorm32/RPi CM4/Emu68)
Amiga 500 (rev 6A, ECS, KS 3.2, PiStorm/RPi 4B/Emu68)
Ryzen 9 7950X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB