For anyone interested in flashing their own TF1260 to the latest firmware update have a looky Man Cave Ramblings

Thanks to Acill's awesome Youtube vid the process was very straight forward and fast once everything is set up.

Last edited by klx300r on 29-Dec-2021 at 03:13 PM.
Last edited by klx300r on 29-Dec-2021 at 03:12 PM.

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@klx300r

I have an A1200 with stock case and Phase5 1260 with the SCSI module attached and maxed out 256mb of Fast RAM. Not sure which version my 060 is, but it is clocked at 50Mhz and has the MMU. With all the continuing interest in the 060 CPU from the Amiga and Atari communities (maybe others as well), has anyone thought about trying to talk to who ever owns the rights to the last and best version of the 68060 to see if a small production run of those chips could be produced? They seem to be nonexistent to purchase new-old-stock from anywhere, and getting them used is outrageously expensive, with a high risk of the seller trying to scam you with a counterfeit slower version that has been rebranded. Are the design drawings lost, making it impossible to produce those chips, or is it just too expensive to produce 10,000 of them?

It doesn't appear that the Vampire's 68080 will ever be made into an ASIIC, so I was just wondering if there is any possibility of any of the old 68060 CPU's being manufactured. Designing and getting a new 680x0 CPU does not seem feasible cost wise.

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Amiga! The computer that inspired so many, to accomplish so much, but has ended up in the hands of . . . . . . . . . .

@klx300r

A new A1200 should be developed and sold in the Amiga market that is backwards and forwards compatible. Build an ecosystem around it.

_________________

@AmigaMac

There's some nice projects out there:
- Amiga 1200+
- ReAmiga 1200
- Amiga on a Chip by Jeri Ellsworth

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@amigadave

With todays technology it should be possible to make it in like 22nm tech and clock it at 1GHz without logical changes, except increased caches, while consuming 1/10th the power.

_________________
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@amigadave

NXP own the 68k range now. I think getting them to produce new 68060 chips or getting some kind of arrangement to license the rev 6 mask and arrange you're own production would require paying everything upfront.

You can probably get an idea of actual cost of production if you approach one of the fabs listed on line armed with the key details of the 68060. According to Wilipedia and most other sources the process used for the production of the 68060 on 0.6μm for early revisions and 0.42μm for rev 5 and 6. I have seen a claim on Amiga.org that rev6 used a 0.33μm process but I don't no if that's valid or not. The size of the die, the actual chip not the package, seem a bit more difficult to tie down. According to this source the die size at 0.6μm is 198mm² while this source claims it is 218mm² but this could be bogus data. Anyway I used an online chip yield calculator assuming the wafer you use is 300mm at 218mm² per die you'd get around 200 working chips per wafer so it would be about 50 wafers to hit the 10,000 mark and at 198mm² per die it would be close to 240 chips per wafer and a total of 42 wafers. of course you want to produce the chips at 0.42 μm or lower if possivble so you get cooler running processor capable of higher clock rates.

By the way the way a while back I did the calculations for how many 68060 chips yout get out of 300mm wafer on process of 5nm based on shinking 0.6μm 218mm² die. I can't remember the exact result now but was upwards 25,000 working chips per wafer. Of course TSMC or whoever are not going to profuce just one wafer on their latest process. I'll leave you to calculate the die size at processes actually relevant such as 0.42μm simply because I can't be bothered right now.

Last important detail is detail is that the chip package is PGA 206.

So to recap you need to tell the chip fab the size of the wafer, the size of the die, the process to be used and what package to use for the chip.

@pixie

The first project listed looks most promising.

I think the following if brought together could deliver something promising to the Amiga market.

- http://www.amigaclub.be/projects/amiga1200plus
- https://www.a1200.net/amiga-1200-case
- https://www.a1200.net/amiga-mechanical-keyboard/
- https://www.a1200.net/amiga-keycaps/

Last edited by AmigaMac on 31-Dec-2021 at 06:52 PM.

_________________

Rob Quote:

NXP own the 68k range now. I think getting them to produce new 68060 chips or getting some kind of arrangement to license the rev 6 mask and arrange you're own production would require paying everything upfront.

Freescale/NXP licensed the rights to manufacture most of the 68k products to Rochester Electronics.

https://electronics-sourcing.com/2015/07/06/rochester-electronics-adds-end-of-life-support-for-freescale-mc68040-mpus/

The 68060 is currently available from them but there is only 1 CPU in stock and they are very expensive.

https://www.rocelec.com/search?q=68060

MC68060RC50
In Stock: 1
1+ $623.77

They can replicate and verify more. Watch the video at the bottom of the following link for how they do it.

https://www.rocelec.com/solutions/design

This is not a cheap way to replicate a chip.

Rob Quote:

You can probably get an idea of actual cost of production if you approach one of the fabs listed on line armed with the key details of the 68060. According to Wilipedia and most other sources the process used for the production of the 68060 on 0.6μm for early revisions and 0.42μm for rev 5 and 6. I have seen a claim on Amiga.org that rev6 used a 0.33μm process but I don't no if that's valid or not. The size of the die, the actual chip not the package, seem a bit more difficult to tie down. According to this source the die size at 0.6μm is 198mm² while this source claims it is 218mm² but this could be bogus data. Anyway I used an online chip yield calculator assuming the wafer you use is 300mm at 218mm² per die you'd get around 200 working chips per wafer so it would be about 50 wafers to hit the 10,000 mark and at 198mm² per die it would be close to 240 chips per wafer and a total of 42 wafers. of course you want to produce the chips at 0.42 μm or lower if possible so you get cooler running processor capable of higher clock rates.

I believe the silicon wafer size used by the 68060 is outdated now. This likely means the original masks would be useless even if licensed to use them. The chip fab process is old enough that it costs more to use than a newer process. It would be better to take the 68060 logic and convert it to a newer process. Then it is tempting to make changes to take advantage of the performance benefits of the improved process and make simple enhancements like enlarging the cache sizes. Some changes may be necessary from just moving to a cheaper and smaller die size. While it would be possible to produce more 68060s, either they would be as close as possible to the original and expensive as Rochester Electronics could do or modernize the production. Both would likely have high development costs but the modernized production would then be much cheaper.

Rob Quote:

By the way the way a while back I did the calculations for how many 68060 chips you get out of 300mm wafer on process of 5nm based on shrinking 0.6μm 218mm² die. I can't remember the exact result now but was upwards 25,000 working chips per wafer. Of course TSMC or whoever are not going to produce just one wafer on their latest process. I'll leave you to calculate the die size at processes actually relevant such as 0.42μm simply because I can't be bothered right now. Last important detail is detail is that the chip package is PGA 206. So to recap you need to tell the chip fab the size of the wafer, the size of the die, the process to be used and what package to use for the chip.

The logic data to go inside is needed too and that requires a license if using the original. There is a layout expense even though most of it can be automated today. The early days of the 68k and Amiga custom chips required hand layout. They were starting to use new development tools with the 68040 and 68060. The 68060 design is somewhat modern but in some ways the 68060 is ancient technology compared to modern chip fabrication.

Last edited by matthey on 31-Dec-2021 at 08:28 PM.

@matthey & Rob,

So long story short, it could never happen and the only way to have new 68060 chips is to emulate them with a Rasperry Pi (or similar) and either build a plug-in board to interface with original Amiga hardware, or just emulate it all (with or without an FPGA for the custom Amiga chips). Unless there still existed some embedded market that could benefit from a few million 68060 chips.

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Amiga! The computer that inspired so many, to accomplish so much, but has ended up in the hands of . . . . . . . . . .

amigadave Quote:

So long story short, it could never happen and the only way to have new 68060 chips is to emulate them with a Rasperry Pi (or similar) and either build a plug-in board to interface with original Amiga hardware, or just emulate it all (with or without an FPGA for the custom Amiga chips). Unless there still existed some embedded market that could benefit from a few million 68060 chips.

Producing new 68060 replicas is likely not practical. If spending the money to produce new 68060 like chips, it would likely be better to enhance the design and modernize the chip fab process which could improve the performance and reduce the power making it more competitive for modern use.

New 68060 replicas of original 68060
licensing costs: unknown
development costs: moderate
production costs: high
chip process: outdated, expensive, low performance
enhancements: no

New enhanced 680x0 based on 68060
licensing costs: unknown
development costs: high
production costs: low
chip process: modern, cheap, improved performance and power
enhancements: yes

Modern enhancements would make the 68060 more competitive.

o cache size should be at least doubled and L2 caches could be added
o return/link stack (became common about the time of the 68060)
o integrate memory controller in CPU (became common shortly after the 68060)
o bring back 64 bit integer MUL and DIV instructions (GCC was using them back then)
o there are a few more integer instructions which could be made superscalar like SWAP
o fully pipeline the FPU (only partially pipelined)

That's a start of what is lacking. The 68060 was a good foundation of a new much improved 68k design but seems rushed to market and unfinished as the Motorola development priority switched to PPC. I suspect that developed was even suppressed and sabotaged so the 68060 would not compete with the PPC. The 68060 had better integer performance than was expected and the longer pipeline should have made it easier to clock up than the early shallow pipeline PPC designs. Maybe Apple wouldn't have switched to PPC at all if they knew how difficult it would be to clock up the shallow pipeline designs. The 68060 with 8 stage pipeline should have had the advantage over both the PPC 603 with 4 stage pipeline and Pentium with 5 stage pipeline but the 68060 was never clocked up because the PPC was the designated Motorola high end architecture.

@matthey

if there's high enough demand for a new enhanced 68060 I'm sure it can be made today but unless it's in the millions prices will still be very high

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@klx300r

Quote:

if there's high enough demand for a new enhanced 68060 ...

If there was really some demand, you would have access to 680120 2Ghz with 4MB of cache

But in this world Freescale ceased the production of this chip 15 years ago.

@OneTimer1

agreed and this is why we see crazy prices for them today

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klx300r Quote:

if there's high enough demand for a new enhanced 68060 I'm sure it can be made today but unless it's in the millions prices will still be very high

CBM mass produced Amigas with the only model likely to sell over a million units being the Amiga 500. They had licensed PA-RISC which they were customizing and would have required an ASIC for an unknown number of sales. They also looked at licensing the 68k from Motorola which would have also required customization for an unknown number of sales. They likely would have used these custom CPUs in multiple products spreading out the costs. They made ASICs for a planned few hundred thousand units of products. Development and ASIC production prices were much higher then when adjusted for inflation.

OneTimer1 Quote:

If there was really some demand, you would have access to 680120 2Ghz with 4MB of cache But in this world Freescale ceased the production of this chip 15 years ago.

Demand is created from products and not from thin air. There was no demand when the 68000 was created either.

Thomas Gunter Quote:

But there was also a statement, as Murray said earlier. I was told several times in the early days of the development: he said, "I don't know why we're building this, why we're investing all this money, because you'll never sell more than 50,000 of them, or 50,000 a year." Probably when we shipped our hundredth million, we were still counting them, past the 50,000.

Murray Goldman Quote:

Anyway, Motorola microprocessors went from sales of zero to sales of about $250,000,000 almost overnight, maybe a year to 18 months or something. And it was at good margin. It was a microprocessor-like business, in which you tend to have better gross margin in that kind of business if you're manufacturing a lot.

http://archive.computerhistory.org/resources/text/Oral_History/Motorola_68000/102658164.05.01.acc.pdf

There was nothing for the 68000 to build on when it was created and no demand. Hundreds of millions of 68k CPUs later (over a million a month sold for awhile) and after 43 years of production, there is at least something popular to build on today. It's not like the 68060 under-performed either. It outperformed the Pentium and PPC 603 at the same clock speed and was competitive with the PPC 601 clock for clock. The 68060 was an in order CPU where PPC CPUs were OoO, it had only 8kiB ICache and 8kiB DCache which the PPC 603 had such poor performance with that the 603e with double the caches quickly replaced it, it had a 32 bit data bus using cheaper 32 bit memory where competitors were often 64 bit and had only a 4 byte per cycle instruction fetch where PPC couldn't even be superscalar. The 68060 did have a deeper 8 stage pipeline which should have allowed to out clock the competition but politics intervened as PPC was designated the high end after the AIM agreement and the 68k was not allowed to compete with it.

Last edited by matthey on 03-Jan-2022 at 01:10 AM.

I think some people don't believe what I've said about the 68060 performance. Let's take a closer look at the performance with the old nbench ByteMark benchmark. The benchmark has 7 integer and 3 floating point benchmarks which are indexed individually and overall to a Dell Pentium 90MHz with 256kiB external L2 using the Watcom compiler 10.0. The benchmarks are sensitive to the compiler but x86 has generally been known for having more mature and better compilers. Let's take a look at some 68k Amiga benchmarks with different compilers.

A1200 68020@14MHz 68882@20MHz with fast mem
SAS/C
---
NUMERIC SORT 0.03
STRING SORT 0.02
BITFIELD 0.04
FP EMULATION 0.05
FOURIER 0.01
ASSIGNMENT 0.06
IDEA 0.03
HUFFMAN 0.04
NEURAL NET 0.01
LU DECOMPOSITION 0.01
===
INTEGER INDEX 0.04
FLOATING POINT INDEX 0.01

A 68020@14MHz has 4% of the integer performance of the 90MHz Pentium with L2. This was the problem CBM didn't address by using low spec processors as the mid '90s were approaching. The Amiga custom chips which CBM didn't upgrade fast enough couldn't make up this much of a difference. Let's take a look at the 68040 then.

A1200 68040@40MHz with fast mem
SAS/C
---
NUMERIC SORT 0.19
STRING SORT 0.12
BITFIELD 0.25
FP EMULATION 0.39
FOURIER 0.00
ASSIGNMENT 0.34
IDEA 0.21
HUFFMAN 0.20
NEURAL NET 0.06
LU DECOMPOSITION 0.26
===
INTEGER INDEX 0.23
FLOATING POINT INDEX 0.04

The 68040 has 23% of the integer performance of the Pentium at 90MHz with L2. At least there is some integer performance but the floating point performance is still very weak which is likely a combination of a stripped down FPU and poor compiler support for it. Most Amiga users never experienced better performance than a 68040.

CSPPC 68060@50MHz with fast mem
SAS/C
---
NUMERIC SORT 0.48
STRING SORT 0.36
BITFIELD 0.80
FP EMULATION 0.68
FOURIER 0.18
ASSIGNMENT 0.72
IDEA 0.50
HUFFMAN 0.72
NEURAL NET 0.29
LU DECOMPOSITION 0.41
===
INTEGER INDEX 0.59
FLOATING POINT INDEX 0.28

Already we can see better 68060 integer performance/MHz than the Pentium (.56 would be on par). Is the floating point performance poor because the 68060 doesn't have a fully pipelined FPU? The results so far come from the ByteMark68kPPC.lha on Aminet. It was actually Frank Wille's vbcc results which I noticed recently on EAB that drew my interest.

https://eab.abime.net/showpost.php?p=1523552&postcount=8

CSPPC 68060@50MHz with fast mem
vbcc
---
NUMERIC SORT 0.38
STRING SORT 0.69
BITFIELD 0.79
FP EMULATION 0.81
FOURIER 0.68
ASSIGNMENT 0.99
IDEA 0.59
HUFFMAN 0.71
NEURAL NET 0.45
LU DECOMPOSITION 0.47
===
INTEGER INDEX 0.68
FLOATING POINT INDEX 0.52

These are impressive 68060 results. Recall that 50/90=0.56 which is the expected result for a 68060@50MHz. This is roughly 21% better integer performance overall than the Pentium while the floating point performance is nearly on par. Maybe the vbcc integer performance is finally improving and maybe the FPU improvements I did for vbcc are finally making a difference. I tried to compile the benchmark with vbcc myself and succeeded but the result hung. I was able to download the benchmark from the following Amiga benchmark though.

nbench on PowerPC
http://amigadev.free.fr/powerpc/nbench.html

The makefile was configured for GCC so I compiled it with GCC with only a few changes in the makefile.

CSMK3 68060@75MHz with fast mem (Rev 6 68060 with fewest mem wait states)
GCC 3.3 (GCC 3.4 killed the 68k integer performance)
---
NUMERIC SORT 0.77
STRING SORT 0.68
BITFIELD 1.80
FP EMULATION 1.90
FOURIER 0.06
ASSIGNMENT 1.42
IDEA 1.74
HUFFMAN 0.81
NEURAL NET 0.32
LU DECOMPOSITION 0.72
===
INTEGER INDEX 1.20
FLOATING POINT INDEX 0.24

My overclocked 68060@75MHz is beating the Pentium@90MHz with external L2 cache in integer performance by 20% (40% better integer 68060 performance than a similarly clocked Pentium). Old versions of GCC (2.95.3-3.3) generated code with good integer performance but poor floating point performance. I just did a quick compile without small data (-fbaserel) or -noixemul so I could likely play with the compile settings to get better results. The 68k compilers have room for improvement too. The 68060 is in-order without an instruction scheduler which makes it especially impressive. Frank's vbcc results outperform a PPC 601@60MHz and my 68060@75MHz is outperforming a PPC 603@75MHz in integer performance (and would be in floating point performance with the vbcc compiled benchmark). The PPC processors are OoO and likely have instruction schedulers (vbcc has an instruction scheduler for PPC). The 603 has a die shrink and 603e has two over the 68060 along with double the caches. The 604e used more than twice as many transistors, had 4 times the caches and had die shrinks over the 68060. It had good performance but was also expensive and in a different class than the more efficient and balanced 68060.

ByteMark results
https://www.macinfo.de/bench/bytemark.html

The 68060 was a very underrated CPU which was poorly supported by compilers. The 8 stage pipeline should have made it possible to out clock the shallow pipelines of the competition at that time. Too bad the Motorola management decisions were political instead of engineering decisions. They threw away the Pentium and PPC killer and now the giant Motorola is no more.

Last edited by matthey on 09-Jan-2022 at 01:04 AM.
Last edited by matthey on 06-Jan-2022 at 07:46 AM.

@matthey

thanks for the testing very informative

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! My Master Miggies- Amiga 1000 & AmigaOne X1000 !
mancave-ramblings
X1000 I BELIEVE

klx300r Quote:

thanks for the testing very informative

It's amazing how many Amiga 68060 accelerators there are today but so few 68060s available. It's too bad when Amiga users have to use LC or EC 68060s in new accelerators with higher clock speeds and which potentially have better memory performance than our old P5 accelerators with '90s memory. The Chinese 68060 fakes also add to the problems.

I made a few minor edits to my previous post. I added that my Rev 6 68060 has 40% better integer performance than a Pentium at the same clock speed. This would actually put it slightly ahead of a Pentium Pro and MMX in integer performance at the same clock speed. The Pentium Pro was the start of the famous Intel P6 microarchitecture which the modern i3, i5, i7 processors are based on, some of the most powerful for a PC today. What were the major P6 microarchitecture changes over the original P5 Pentium?

o In order to OoO execution, micro-oped, more speculation (more powerful but higher power requirements)
o 14 stage pipeline from 5 stages (allows higher clock speeds but the 68060 already had 8 stages)
o register renaming (more efficient register use and easier instruction scheduling, 68060 had it too)

The 68060 with an in order core design was outperforming more than a few OoO cores of competing architectures which saves power and area. The 68060 is also using a cheaper 32 bit data bus and memory which saves power and cost. The 68060 is a balanced design (performance, power, area balanced instead of one prioritized) compared to the P6 microarchitecture core design which is a higher performance design.

Last edited by matthey on 09-Jan-2022 at 02:53 AM.
Last edited by matthey on 09-Jan-2022 at 02:52 AM.

Here's my latest testing updating to the latest Alpha firmware and comparing results to Beta firmware and also my Cyberstorm MKIII

Man Cave Ramblings

Last edited by klx300r on 11-Apr-2022 at 03:42 AM.
Last edited by klx300r on 11-Apr-2022 at 03:32 AM.

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c64-2sids, A1000, A1200T-060@50(finally working!),A4000-CSMKIII
! My Master Miggies- Amiga 1000 & AmigaOne X1000 !
mancave-ramblings
X1000 I BELIEVE

klx300r Quote:

Here's my latest testing updating to the latest Alpha firmware and comparing results to Beta firmware and also my Cyberstorm MKIII Man Cave Ramblings

It looks like MAPROM has been enabled to give better ROM performance (ROM is copied to faster memory, remapped and protected). This is possible with the CSMKIII as well and makes a significant difference in performance. Perhaps the degraded WriteFastl and Fast2Fastl performance is due to the store/load bypass PCR bit 5 being set to 1 to avoid 68060 rev1 bugs. The code sequences which trigger the bug are rare.

68060 ERRATA Rev 4.0 Quote:

Workaround: Set Processor Control Register bit 5 = 1. For xF43G and xG65V masksets, PCR(5) = 1 disables one of the specific 68060 result forwarding features, store/load bypass. The store/load bypass feature, which eliminates a pipeline stall in scenarios of successive instructions storing and loading back data from the same address, should have very limited performance impact on most programs.

Perhaps "very limited performance impact" may be -1.56 MiB/s for WriteFastl and -5.53 MiB/s for Fast2Fastl. You should install a rev6 68060 to see if the "very limited performance impact" goes away.

@matthey

Quote:

Perhaps "very limited performance impact" may be -1.56 MiB/s for WriteFastl and -5.53 MiB/s for Fast2Fastl. You should install a rev6 68060 to see if the "very limited performance impact" goes away.

I tried 15 years ago when prices were lets say 'fair' to get a hold of a Rev6 060 with no luck as one wasn't a full 060 so returned it and other was falsely labeled as a Rev6 but was in fact a Rev1 which I still have today and I'm very happy with it

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c64-2sids, A1000, A1200T-060@50(finally working!),A4000-CSMKIII
! My Master Miggies- Amiga 1000 & AmigaOne X1000 !
mancave-ramblings
X1000 I BELIEVE