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Hammer 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 13-Oct-2022 21:46:02
#101 ]
Elite Member
Joined: 9-Mar-2003
Posts: 4611
From: Australia

Quote:

Karlos wrote:
@Hammer

Quote:

Hammer wrote:
@Karlos

I don't want another ColdFire BS that breaks compatibility with my classic Amiga WHDLoad games collection.



Was there some context to this? If you think MC64K is any attempt whatsoever to make a 64-bit Amiga (in)compatible, you've not been paying attention. It's not even a CPU. It's a bytecode executing Virtual Machine, more akin to the JavaVM than a 68K. Unlike the JVM, but like a real CPU, it uses a register model. It exists for the sole purpose of providing an assembly language environment inspired by 68K, which as we all know, is the best assembly programming environment that has ever existed.


Your project is like Virtual Processor (VP) from Tao Group and Bill Mc Ewen's Amiga Inc tried to flog it as Amiga Anywhere.

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Amiga 500 (rev 6A, KS 3.2, PiStorm/RPi3a/Emu68)

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 13-Oct-2022 22:38:20
#102 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@Hammer

Quote:
Your project is like Virtual Processor (VP) from Tao Group...


To borrow the line from Bender Bending Rodriguez, "Oh wait, you're serious? Let me laugh even harder!"

I mean it really isn't like that. But let's say it was. What does that have to do with you not being able to run WHDLoad on a ColdFire? I mean the analogy couldn't be worse, really.

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Bosanac 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 13-Oct-2022 22:44:49
#103 ]
Regular Member
Joined: 10-May-2022
Posts: 234
From: Unknown

@Karlos

Statistics go brrrrpt!

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MEGA_RJ_MICAL 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 14-Oct-2022 0:08:48
#104 ]
Super Member
Joined: 13-Dec-2019
Posts: 1200
From: AMIGAWORLD.NET WAS ORIGINALLY FOUNDED BY DAVID DOYLE

Quote:

Bosanac wrote:
@MEGA_RJ_MICAL

Rich is every sense of the word.

How's that new heating bill up in Scotland? Financially crippling for you PIP claimants my employees in the UK inform me.



Ah, dearest friend Bosanac,

certainly not rich in creativity or imagination,
nor in deduction,
if you sheepishly join the crowds of peons who keep implying I am Franko.

I am not informed of heating bills in Scotland,
nor of financial crippling of PIP - as I hail not from the not so united Kingdom.

As a matter of fact, I am now far from the echoing halls of my manor,
in a land that is as extraneous as a land can be to the concept of "heating".

SPEAKING OF HAILING,
I sense the oily texture of slavic filth!
That would certainly make your purported wealth likely to be,
and its origins - obvious.


And now,
please,
back to made up central processing units.


/MEGA!

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cdimauro 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 14-Oct-2022 4:44:20
#105 ]
Elite Member
Joined: 29-Oct-2012
Posts: 3097
From: Germany

@MEGA_RJ_MICAL

Quote:

MEGA_RJ_MICAL wrote:
Quote:

Hypex wrote:

I'd never heard of this Tina before.




It is,
I believe - friend Hypex,

a beautiful girl from Italy.



as seen here,
cosplaying as "Kickstart 1.x Boot Screen"




/MEGA!


LOL

Well, it was 12Kg ago. It reminds me that I should change the picture on my LinkedIn profile. Thanks.

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cdimauro 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 14-Oct-2022 4:46:58
#106 ]
Elite Member
Joined: 29-Oct-2012
Posts: 3097
From: Germany

@Karlos

Quote:

Karlos wrote:
Back on topic, the changes that were made to make MC64K's register-to-register "fast path" subset use 2-byte instructions was merged and I even managed to update the documentation.

OK, so basically the last changes that you made (and testes) went on mainline.

Nothing new (e.g.: 3 operands) since then.
Quote:
Since the actual opcode values are likely to change further until stabilising, all reference to the absolute opcode values have been replaced with their symbolic enumerations from the code.

Makes sense. I expect new changes.
Quote:
Fixed a few bugs in the assembler (specifically around the handling of constant integer and floating point expressions) although the most egregious bug of all - being written in PHP - still remains unfixed.

Well, that's not a bug IMO but a feature: it should be faster to develop the assembler with PHP and it's not a performance-critical part.

For similar reasons I use Python. Development time matters...

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 14-Oct-2022 6:06:36
#107 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

I felt updating the docs was important after such a large change.

The additional instructions are next.

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 14-Oct-2022 22:15:01
#108 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

Conditional Set operations have now been added. On 68000, the Scc instruction sets the byte value at the effective address to -1 if the condition is true, or zero otherwise.

MC64K doesn't have a condition code register, so like the conditional branch instructions is sized and takes one or two source operands for testing. As an example:

On 68K, the following code

tst.l (a0) ; test long value at a0
smi d0 ; d0.b is -1 if value was negative

On MC64K becomes:

smi.l (a0), d0 ; d0.b is -1 is long value at a0 is negative

The full spectrum of signed and unsigned comparisons are present, as are floating point variants.

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Bosanac 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 14-Oct-2022 22:25:30
#109 ]
Regular Member
Joined: 10-May-2022
Posts: 234
From: Unknown

@MEGA_RJ_MICAL

Im not a Slav.

Try again peasant.

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 14-Oct-2022 22:41:43
#110 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@MEGA_RJ_MICAL

Quote:
As a matter of fact, I am now far from the echoing halls of my manor,
in a land that is as extraneous as a land can be to the concept of "heating"


I wasn't aware deporting undesirables to Rwanda has actually started yet.

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MEGA_RJ_MICAL 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 1:17:43
#111 ]
Super Member
Joined: 13-Dec-2019
Posts: 1200
From: AMIGAWORLD.NET WAS ORIGINALLY FOUNDED BY DAVID DOYLE

Quote:

Bosanac wrote:
@MEGA_RJ_MICAL

Im not a Slav.

Try again peasant.


Once again,
you are irresistibly lured to adopt my unique jargon,
dig from my peculiar satchel of words!

As I already said,
imitation is the greatest form of admiration.

You might not be a slav, friend Bosanac,
but just add a final "e" -
as you are clearly enthralled into perpetuating the myth of MEGA_RJ_MICAL.




/M!

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cdimauro 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 5:51:43
#112 ]
Elite Member
Joined: 29-Oct-2012
Posts: 3097
From: Germany

@Karlos

Quote:

Karlos wrote:
@cdimauro

I felt updating the docs was important after such a large change.

The additional instructions are next.

Kudos for that: developers do NOT like to write documentation...
Quote:

Karlos wrote:
Conditional Set operations have now been added. On 68000, the Scc instruction sets the byte value at the effective address to -1 if the condition is true, or zero otherwise.

MC64K doesn't have a condition code register, so like the conditional branch instructions is sized and takes one or two source operands for testing. As an example:

On 68K, the following code

tst.l (a0) ; test long value at a0
smi d0 ; d0.b is -1 if value was negative

On MC64K becomes:

smi.l (a0), d0 ; d0.b is -1 is long value at a0 is negative

The full spectrum of signed and unsigned comparisons are present, as are floating point variants.

So, I assume that you've also a "cmp equivalent".

Have you considered to add something like x86's SETcc? It's very useful when dealing with booleans, since it gives back 0 or 1 as result.

Whereas the 68k's Scc is good for producing "masks".

I've added both on my NEx64T because they have their specific use-cases / usefulness.

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 7:11:27
#113 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

Quote:
So, I assume that you've also a "cmp equivalent"


There is a three operand variant for that.

For example, the 68000:

cmp.l (a0), d1
shi d0 ; d0.b is -1 when the unsigned long at a0 is larger than the one in d1

In MC64K becomes:

shi.l (a0), d1, d0

Each source operand can be any readable EA mode and the destination can be any writeable one. There isn't yet a "fast path" variant for register only operands.

Documentation here

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cdimauro 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 9:10:46
#114 ]
Elite Member
Joined: 29-Oct-2012
Posts: 3097
From: Germany

@Karlos

Quote:

Karlos wrote:
@cdimauro

Quote:
So, I assume that you've also a "cmp equivalent"


There is a three operand variant for that.

For example, the 68000:

cmp.l (a0), d1
shi d0 ; d0.b is -1 when the unsigned long at a0 is larger than the one in d1

In MC64K becomes:

shi.l (a0), d1, d0

Each source operand can be any readable EA mode and the destination can be any writeable one. There isn't yet a "fast path" variant for register only operands.

Documentation here

I see. That's impressive: 3 EA operands. Your ISA looks the VAX one.

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Bosanac 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 9:24:24
#115 ]
Regular Member
Joined: 10-May-2022
Posts: 234
From: Unknown

@MEGA_RJ_MICAL

Nam 'ana bialtaakid abd.

Proud of it too!

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 9:24:27
#116 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

The triple EA modes do raise the spectre of code density again. I'm considering adding support for 8 and 16 bit displacements for indirect with displacement modes.

Today, all fixed displacements are 32 bit, so the following instruction ends up 17 bytes long!

seq.q 8(a0), 16(a0), 1(a1)

Having a single 32-bit displacement type seemed like a good idea at the time but most of the time it's a huge waste for EA modes where displacements are small.

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cdimauro 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 9:33:44
#117 ]
Elite Member
Joined: 29-Oct-2012
Posts: 3097
From: Germany

@Karlos

Quote:

Karlos wrote:
@cdimauro

The triple EA modes do raise the spectre of code density again. I'm considering adding support for 8 and 16 bit displacements for indirect with displacement modes.

Finally! Wise decision.
Quote:
Today, all fixed displacements are 32 bit, so the following instruction ends up 17 bytes long!

seq.q 8(a0), 16(a0), 1(a1)

GLOM. It's too much, for what it does.
Quote:
Having a single 32-bit displacement type seemed like a good idea at the time but most of the time it's a huge waste for EA modes where displacements are small.

32-bit displacement are needed. But only as a "last resource".

So, if you have the possibility to add 8-bit displacements then it's much better. If not, then 16-bit displacements. While keeping the 32-bit ones.

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 9:38:56
#118 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

The 32 bit decision was a simplification originally since theres one way to represent a fixed displacement and read it in from the instruction stream. It wasn't chosen specifically to waste space and was tolerable in cases where you typically only have one such operand in a statement. However, there are free EA slots and encoding integers into smaller representations is a solved problem for immediates already. So it seems like a worthwhile time to do it.

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 11:04:01
#119 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@MEGA

Quote:

Karlos wrote:
@MEGA_RJ_MICAL

Quote:
As a matter of fact, I am now far from the echoing halls of my manor,
in a land that is as extraneous as a land can be to the concept of "heating"


I wasn't aware deporting undesirables to Rwanda has actually started yet.


Unless, of course, you are a descendant of the last lot of undesirables we exported to the Antipodes, so great was the desire to maximise the distance between them and blighty.

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Karlos 
Re: MC64K - Imaginary 64-bit 680x0
Posted on 15-Oct-2022 12:30:18
#120 ]
Elite Member
Joined: 24-Aug-2003
Posts: 3375
From: As-sassin-aaate! As-sassin-aaate! Ooh! We forgot the ammunition!

@cdimauro

There are currently exactly 32 unused EA enumeration values and 16 registers. There are two indirect modes that support a displacement (not including the PC variant). It seems like my unconscious mind was keeping those slots free for this exact purpose.

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