@kolla

Quote:

kolla wrote: Another fact… V4SA is an embedded system, and hence not Amiga.

I don't care.

V4SA can run AmigaOS, Amiga apps and Amiga games. V4SA is marketed as an Amiga clone.

Last edited by Hammer on 22-May-2024 at 09:02 AM.

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@Hammer

Then Amiga is also an embedded platform.

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@Hammer

Quote:

Hammer wrote: @bhabbott That's not" Wolfenstein 3D". Amiga's chunky pixel is 1 bitplane. Amiga's stock 68000 7.1 Mhz Wolfenstein 3D clone would speed up with 1 bitplane.

If that's not "Wolfenstein 3D" then neither is the Apple IIGS version (which only has 16 colors). Both are as close as you can get to the original on those platforms. Reject the Spectrum version and your argument for using it as a benchmark falls apart.

Quote:

That's NOT "Doom". It's yet another Wolfenstein 3D clone with a very low color display.

16 colors actually.

It's "Doom", but not Doom. But Doom is just an 'enhanced' clone of 3D Monster Maze on the ZX-81!

@kolla

Quote:

kolla wrote: @Hammer Then Amiga is also an embedded platform.

Prove RISC-V is useful for the Amiga's CPU accelerator.

Last edited by Hammer on 23-May-2024 at 11:41 AM.
Last edited by Hammer on 23-May-2024 at 11:40 AM.

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@bhabbott

Quote:

If that's not "Wolfenstein 3D" then neither is the Apple IIGS version (which only has 16 colors). Both are as close as you can get to the original on those platforms. Reject the Spectrum version and your argument for using it as a benchmark falls apart.

That's rubbish. Spectrum's attempt doesn't even look like "Wolfenstein 3D.

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@kolla

Quote:

kolla wrote: @Hammer So... fancy RISC-V dev boards with tons of RAM are still cheaper than Apollo V4SA :)

My RTX GPU has an embedded RISC-V microcontroller. So what.

https://www.youtube.com/watch?v=7xJSmtKa6LQ
Intel Altera Cyclone V FPGA as 486-based PC running Windows 3.1.

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@Hammer

While I am not a fan of closeness of Gunnars market and cooperation approach,
one must admit Vampire is de facto most Classic improvement ever done,
in both CPU and chipset, while remaining high degree of compatibility.

Also, taking AROS to updated and distro level is a big plus.

Too bad it does not progress to ASIC/NAtami board level
and CPU and chipset arent more opened to licensing, as well as
more developer tools, cooperation and documentation is needed for wider adoption.

As well as the way internal team memebers have been treated over time.

In general, execution is nice and stylish, my V4 experience with AmiKit XE Vampire ,
MacOS Classic emulation capability, Atari Mint ability and even pimped OS 3.9 distro
was very positive, way more then x1000 experience.

In a way it is the most Amiga seen since A1200/A4000 launch, too bad its small
and narrow minded approach to become de facto standard of the new Amiga
and uniting factor for most Amigans.

Also being a FPGA developer board in reality has its own peculiarities and limits
compared to Classic board, V4 series are increasingly expensive especially with port expanders
bringing price range closer to OS4 hw prices and there is more competition with Warp 060
and PiStorm that is becoming better in some areas.

FPGA also has it CPU freq limits - I believe most V4 boards have about 100Mhz real freq (x13 A500)
and developers have complained V2 and V4 have been moving target due added chipset/CPU features over time, but I believe they are quite mature by now. (which is downside to FPGA updatdability and bugfixing to carved structure)

Other then that 16 bit AHI, RTG, 12mB Chip RAM, tons of FAST RAM and faster CPU then 060 are most welcome additions above what other FPGA boards mostly offer.

Last edited by vox on 23-May-2024 at 02:28 PM.

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@vox

Had they use a pistorm like concept, would it mean it would allow saga to be way faster? After all the cores wouldn't be needed for CPU anymore... or get a smaller FPGA lowering the cost

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@pixie

Its hard to guess but I assume cheap and fast ARM CPUs cost less then larger FPGAs and FPGA development. Thus PiStorm approach is effective and cheaper in essence, using PiS as base.
As race for fastest Amiga in practice, Pi is great there, abeit using advanced emulation.

However, best prospect of 080 development is possibility of FPGA to ASIC, one that currently
Apollo Team fails to realise and shows less and less interest in.

In theory, 1Ghz 080 could beat advanced emulation and enable sensible coding again (optimized one) while emulation is kind of limited approach of accelerating emulated, thus no real way forward.

While I havent tested it, development of basic 3D core and hopefully Warp3D / OpenGL drivers for it is nice. It has everything AAA Amiga would be except mainboard execution and thus feels less like a real Amiga in hardware, but shows its good sides in software that can use it.

Sadly, number of software that recognoises 080, is optimised for it is so small its rejected as separate Aminet category for time being.

What will be in future, we ll see. Real Amiga for me would be All in One Natami like board with 800Mhz plus 080 and SAGA done in real chips and with connectors now provided as expansion as standard.

Until then FPGA V4 and V2 systems seems like road to it, but not fully it,

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@Hammer

I don’t grasp how you manage to become so on the defensive, it was you who said Amiga is not an embedded plattform, even when V4SA clearly is exactly that. And I wasn’t the one writing page up and down about RISC-V, I have no stake in that game at all. I’m sure someone will have a go at getting Amiga on RISC-V as well.

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vox Quote:

Its hard to guess but I assume cheap and fast ARM CPUs cost less then larger FPGAs and FPGA development. Thus PiStorm approach is effective and cheaper in essence, using PiS as base. As race for fastest Amiga in practice, Pi is great there, abeit using advanced emulation.

Good assumptions.

vox Quote:

However, best prospect of 080 development is possibility of FPGA to ASIC, one that currently Apollo Team fails to realise and shows less and less interest in.

I think Gunnar realizes an ASIC provides the "best prospect" but he is hesitant to move in that direction, likely for various reasons. When I was pushing for an ASIC as part of the AC team, he acted like it was not financially feasible even as I was working on solutions. In the end, he wasn't willing to cooperate and move toward ASIC readiness. I couldn't move forward without him on board. Uncertainty kills business plans. He wasn't the only source of uncertainty though. The whole Amiga situation is problematic for the Amiga market. I expect Natami at least partially died to uncertainty as well although I was not an insider for that project. What makes you think Gunnar "shows less and less interest in" an ASIC?

vox Quote:

In theory, 1Ghz 080 could beat advanced emulation and enable sensible coding again (optimized one) while emulation is kind of limited approach of accelerating emulated, thus no real way forward.

Absolutely. A real CPU can have features like a working MMU not that the FPGA AC68080 supports a 68k compatible one anyway.

vox Quote:

While I havent tested it, development of basic 3D core and hopefully Warp3D / OpenGL drivers for it is nice. It has everything AAA Amiga would be except mainboard execution and thus feels less like a real Amiga in hardware, but shows its good sides in software that can use it.

3D units in FPGA can have good performance individually but there is not enough of them in parallel to compete with ASICs. ASICs give a huge jump in transistor budget which is a major benefit to 3D hardware.

vox Quote:

Sadly, number of software that recognoises 080, is optimised for it is so small its rejected as separate Aminet category for time being.

The AC68080 ISA has been a moving target and support is small so it is a reasonable decision. Gunnar has made major changes and not just additions but removals. The ISA needs version change logs and the documentation updated and in one location. Official software should be available from one location with old versions accessible. Gunnar likes to do do overs where he will wipe the old and start over. He has wiped the AC forums for no reason I know of. Gunnar is peculiar and flaky in my experience. This is not my experience with Jens and Thomas who seem professional but Jens was much less involved when I was a member and Gunnar contacted Thomas to ask for permission to use SAGA based on my suggestion that chipset/RTG support would add value to AC accelerators. Thomas didn't join or rejoin the team until well after I had left (Thomas, Jens and Gunnar were core Natami developers).

vox Quote:

What will be in future, we ll see. Real Amiga for me would be All in One Natami like board with 800Mhz plus 080 and SAGA done in real chips and with connectors now provided as expansion as standard. Until then FPGA V4 and V2 systems seems like road to it, but not fully it,

The Natami MX board is a beautiful work of art but I'm afraid it would have been too expensive. I believe it would be more competitive to reduce the size by moving some functionality to an optional legacy I/O board. With an ASIC SoC, it should be possible to mass produce a small SBC for under $100 USD and that is what is needed to stay competitive for low end hardware. Optional hardware could increase the price though.

@vox

Quote:

Too bad it does not progress to ASIC/NAtami board level and CPU and chipset arent more opened to licensing, as well as more developer tools, cooperation and documentation is needed for wider adoption.

As for wider adoption, AC68080 V4 doesn't have standard 68K MMU, hence no memory-protected enabled Linux 68K.

Non-memory protected uClinux runs low-cost microcontroller class CPUs.

Quote:

Also being a FPGA developer board in reality has its own peculiarities and limits compared to Classic board, V4 series are increasingly expensive especially with port expanders bringing price range closer to OS4 hw prices and there is more competition with Warp 060 and PiStorm that is becoming better in some areas

"Phase 5 tax and weak economies of scale".

Vampire V4's Cyclone V E FPGA seems to be a 5CEFA5F23C8N (77,000 LE, 5,001,216 bits or 5.00 Mbits) model i.e. Cyclone V 5CEA5. Mid-range of Cyclone® V E FPGA family.

MiSTer's Cyclone V SE FPGA is a 5CSEBA6U23I7 (110,000 LE, 5.44 Mbits, dual-core ARM Cortex A9) model.

RPi 3+, 4B, and CM4 are leveraging larger economies of scale outside the Amiga market i.e. Linux ARM LE.

Low cost Efinix's Trion T80144 FPGA is used for PiStorm32 Lite gateway. Low cost CPLD for the original PiStorm. PiStorm16 is under development with low cost FPGA and official RPi 4 support for the 16-bit Amigas.

A3000/A4000 has the Z3660 solution for Motorola/Freescale exit.

Quote:

FPGA also has it CPU freq limits - I believe most V4 boards have about 100Mhz real freq (x13 A500) and developers have complained V2 and V4 have been moving target due added chipset/CPU features over time, but I believe they are quite mature by now. (which is downside to FPGA updatdability and bugfixing to carved structure)

Updating the firmware is not a problem with easy firmware update methods.

Emu68's PiStorm32 Lite version has bundled FPGA updates.

Last edited by Hammer on 24-May-2024 at 04:50 AM.

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@kolla

Quote:

kolla wrote: @Hammer I don’t grasp how you manage to become so on the defensive, it was you who said Amiga is not an embedded plattform, even when V4SA clearly is exactly that. And I wasn’t the one writing page up and down about RISC-V, I have no stake in that game at all.

The difference is SiFive has multiple millions of dollars from VC investors e.g. $61 million in series E funding in 2020, $175 million in funding in 2022. The total funding as of March 2022 for SiFive is $350 million.

SiFive being compared to the "born again" 68K project is strange.

I already have many custom RISC-V microcontroller-enabled devices.

SiFive's U74-MC Core is a full-Linux-capable i.e. fully functional MMU.

Quote:

I’m sure someone will have a go at getting Amiga on RISC-V as well.

For C= Amiga platforms, it depends on GPIO's performance.

RISC-V was discussed in the PiStorm discord channel. It's good to evaluate other options since the C= Amiga platforms could out-last the supply of RPi 3A+, 4B, and CM4.

https://endoflife.date/raspberry-pi
PRi 3A+ has 01 Jan 2028 end of life.
PRi 4B has 01 Jan 2031 end of life.

Last edited by Hammer on 24-May-2024 at 04:32 AM.
Last edited by Hammer on 24-May-2024 at 04:19 AM.

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@Hammer

pistorm on risc-v will be worth nothing crap as it is on arm.
want to switch to little endian provide something decent.
something as good as windows or android

@ppcamiga1

No-one is switching to little endian here, it's just you whining up and down about it.

ARM does big-endian natively when instructed to do so (as with Emu68) and RISC-V is also agnostic about it.

https://inst.eecs.berkeley.edu/~cs250/fa11/handouts/riscv-spec.pdf


"RISC-V can be implemented with either big-endian or little-endian memory systems"

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@kolla

my theory is that he thinks that his ignorance somehow taunts the rest of us, so he keeps spewing falsehoods. In his little world it somehow makes his arguments stronger.

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kolla Quote:

"RISC-V can be implemented with either big-endian or little-endian memory systems"

RISC-V should be fully customizable for everything after the 4th ISA do over.

https://groups.google.com/a/groups.riscv.org/g/isa-dev/c/9tg4gGg8w-c/m/ADy-5lrHAgAJ Quote:

There is no room in the 32-bit opcode space to put big-endian LOAD/STORE, but an extension could easily add these as 48-bit or 64-bit opcodes. The big advantage I see from such a bi-endian extension is that it would make RISC-V truly bi-endian with native memory access in either order as needed. (For the extreme embedded case, new standard long-form big-endian memory access opcodes could be "aliased" into CUSTOM-0/CUSTOM-1 to fit them on a 32-bit-instruction-only machine.)

The response is appropriate.

Quote:

the consequences of that are that it would make big-endian a "second rate citizen"... although at this point it's almost too late.

Will big endian be back for RISC-VI?

@ppcamiga1

Quote:

ppcamiga1 wrote: @Hammer pistorm on risc-v will be worth nothing crap as it is on arm. want to switch to little endian provide something decent. something as good as windows or android

The RISC-V standard specifies that you can have big-endian data (loads/stores), but unlike Aarch64, you cannot have big-endian code.

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@matthey

Quote:

I think Gunnar realizes an ASIC provides the "best prospect" but he is hesitant to move in that direction, likely for various reasons. When I was pushing for an ASIC as part of the AC team, he acted like it was not financially feasible even as I was working on solutions. In the end, he wasn't willing to cooperate and move toward ASIC readiness. I couldn't move forward without him on board

The goal of the Apollo Project always was and is to revive Amiga and to make 68K Asics as some point.
We have a long roadmap that are following for this.
The polishing and verification of the chipset and CPU in the FPGA as an important part of this roadmap.



Matthey to make this very clear: you know absolutely nothing about how to make a CPU, or chipset or an Asic.
Your contribution in the Apollo Team was in a nutshell - just talking bullshit.
Your arguing about topics of which you lacked know-how got on the nerves of everyone.
And when it came clear that you even faked a statistic to back-up one of your opinions - all of the team unanimously voted you to go.

Last edited by Gunnar on 26-May-2024 at 10:43 AM.

@Gunnar

If the goal always was to revive Amiga, then how come it took so many years for the word “Amiga� to even appear on apollo-core.com?

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