@billt
I thought there was SATA, PCIe and USB cores available in webpack, but maybe I'm wrong. An audio interface isn't much work, it could simply be a memory mapped buffer writing at 48/44.1kHz to S/PDIF and I2S.
Running SATA and PCIe at the same time is tricky as the clocks are different, but given a big enough FPGA it's at least possible. S6 doesn't do a whole lot of lanes anyway, afaik. And K7 is not exactly cheap. An S6 design should be possible in the ~5W range, same as FCH. Last edited by olegil on 27-May-2015 at 06:03 PM.
_________________ This weeks pet peeve: Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean. |