@Boot_WB

Quote:

Boot_WB wrote: @billt Quote: billt wrote: [...] And that's what I enjoy thinking about. No problem Bill, and wasn't meaning to be overly critical, I was just challenged to understand your design philosophy. Generally (aside from Human Factors) one would design the shell around the resultant motherboard, such that routing wouldn't be limited to pre-existing locations. It seemed an odd choice to start with the simplest bit (the case) as the template and design the most complicated bit (the motherboard) around that.

Making a new shell as well has advantages and disadvantages.
Pros:
Get exactly what you want
Cons:
More NRE costs for tooling etc.
I'm not a mechanical engineer or CAD guy. Look inside a laptop, it's a freakin complicated structure. To be light, strong, and allow air to move for cooling, and to have room for what needs to go in there, but also trying to be relatively slim and not bulky.
That much more work to do...

It's just way easier for me to buy a PC laptop and clone the board, than to design a shell and a board.


Quote:

Re: buses at al - sorry, for some reason I'd inferred that you were planning an expansion card using CAN bus or something - my misunderstanding, got lost in acronym land.

I would only plan to use what makes sense. CAN bus doesn't offer anything for Desktop or laptop PPC machine IMHO, so if present it will go unused like several other things. The CPU I like today has 4 PCIe links, some USB, some SATA, ethernet, etc. that are very normal PC things to go for. To get what I want that is missing, I'd go with an AMD FCH southbridge chip on one of the CPU's PCIe links. There had been disucssions of whether this sort of thing would be possible long ago, I think starting on a MOS/Genesi forum, and then A-Eon and Varisys made it real on Nemo to prove the concept works, even though AMD calls the "northbridge" bus something other than PCIe then and yet another name now. At least on sb600 it's PCIe enough to work.

Quote:

Re: SD card slot leakage current - what sort of magnitude are you talking here? Can this actually be a noticable saving, or is it hysteresis, or losses through decoupling capacitors (ie physically measurable, but in practice only likely to consume/save a second or two from a four-hour battery life). What level of power loss can actually be saved here? Is it proportionate to prioritise this as a power-saving goal, or is the additional complication of control circuitry actually likely to increase power loss overall?

This is small current that goes from gate to drain of a MOS transistor. This is not a path you want any current going through, ever, no matter what's happening or in use. It's an imperfection of things, but it's a reality to deal with. It's a per gate thing, and scales with complexity. And as technologies get smaller, it's showing itself more significantly. Older techs had ticket gate oxides, which leaked less, and older techs also had fewer transistors. As we go form those older things and make them smaller, the thinner oxide lets a higher percentage through, and you also have a lot more transistors doing that. So this static leakage current is becoming less and less negligible.

An SD controller isn't as complex as a CPU, but it's something. So if you aren't using it, remove all power. This saves you whatever. Now, look at the CPU I like, the T4240. That's a lot more complicated, and has a lot more transistors. If you're doing something simple, like reading an email, then you don't need all 12 dual-thread cores screaming at top speed to accomplish this task acceptably. So reorganize the running threads to the minimum number of cores, and do the most aggressive powersaving mode to the unused cores. I don't know if Freescale has it set up to remove power to unused cores or not, so there may or may not be a limit there based on their design.

I have an iBook G4 in storage, I need to get a new backlight or something so I can see what I'm doing again, though it works with a desktop monitor just fine. I bought the highest performance one used on Ebay that I could find a while ago. Though it did not have its max memory apability installed. There was some internal ram, and an SODIMM stick half of the max possible. So I bought a max size SODIMM, and watched my battery runtime instantaneously cut in half. That's really significant. Hmmm... I put it back the way it was. The memory had that much effect on my battery time. This is where I got the idea to power down some memory slots when not really needed. If all your software fits in one memory slot, say you need 1GB and you have two slots with 4GB each installed. So run your 1GB of software on one of those two 4GB sticks, and power down the second stick. You've still got 3GB free, and you're not leaking through a 4GB stick you don't need right now. This will probably save you more than powering down the SD controller. I expect I'll need to find a new iBook battery when I get it out of storage this summer.

Re: integrated expansions - they are the only thing that makes sense in a laptop, I agree. You don't want to waste power on a discrete chip when you've got the peripheral already built into the SoC. For a desktop, focusing once again on cost, it's likely to be less of a price-driver than man-hours spent writing a new driver for an esoteric SoC peripheral, or revising a board design (more complexity makes this more likely).

Quote:

Re: Reinitialisation of hardware without rebooting, adding/removing memory during runtime: That sounds like a very large can of worms - I wouldn't even know what was involved, how much is handled by firmware/BIOS, etc.

It is a big can of worms. But in the world of a laptop, something that should be done anyway for ACPI power management, when things go into hibernation to be recovered later. Very similar actions to take in capturing and saving registers before removing power, and then restoring power and then restoring registers for continued operation.

Yes, this would take time for software to really put to good use. But the hardware should come capable of such things, as you cannot change the hardware later. My philosophy is hardware now, software hopefully someday. If software never does do that, then we'll have to live with a shorter battery runtime, but it will still function during that time, and will still function when plugged in. The only thing to suffer from no special software considerations is battery runtime.

Now, to your other part of the question about extra control circuitry being more overhead than you save. This is where power saving design is going inside of chips with multiple power domains. DC/DC converters often have an enable control pin, and both the CPU and the southbridge have GPIOs to control such things. There's not really any added circuitry that isn't already in my chosen chipset. Current switching power supply design is very efficient. It's just a matter of choosing what to turn off and having enough controllable power outputs for the number of domains and states I want.

Quote:

Re: existing laptop shell: One question: would it not be cheaper, and free you from arbitrary design limitations (and compromise) to just have a laptop shell made? Pressed aluminium, or injection moulded plastic isn't that expensive compared to revising prototype boards (if it saves you a single revision it'll be cheaper). You could even just replace the base of an existing shell to free up your design whilst taking advantage of pre-manufactured subassemblies (eg screen panel, hinges, etc) - although as an computer/electrical designer, that probably sounds incredibly dull to you.

You just added to the NRE costs you're previously discouraged. :) I'm not a CAD guy or a mechanical engineer. And I'd like to minimize what I pay others to do toward my hobby project.


Quote:

All the best Bill, I am interested to know where you go with it: with the Amiga I was more of a hardware tinkerer than software, so I am always quite interested in other people's hardware projects.

As I've been thinking through this for 10 years now, and we can all see how successful I've been, please don't expect much more than that anytime soon. :p Though we're abotu to have a more spacious home after basically moving out of my previous place for the past 5 years (since I got married), once we're settled in I may have more of a place to do such things again. I expect to have a "computer room" again, even if I might not get to go there very much. I'm back for a Masters Degree in EECE with relevant things in mind. When I started my undergrad, I wanted to work for Commodore doing exaclty this sort of thing designing motherboards, but they flopped during my first year of school then. But I don't think that free time will ever be my friend, and I've been hit with several losses of components (PA Semi, Uli M1575, Jmicron SDXC controller...), and perhaps this will only ever be a fun thought problem.

I wonder if by the time I get moving on anything again, there will be a newer better CPU and Olegil will be doing another face-palm at me for changing something yet again. :)

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@Boot_WB

>>DIU
>Let's assume it'll be crap.

If I get dev board with DIU, I’ll have to check it.
(all I know so far "DIU supports video at up to 1280x1024x32bpp" and that it looks like a simple way to show "framebuffer" bitmap from system memory)
From the past we have seen that good CPU can compensate bad GPU in some use cases.
(like 060/50 doing some things faster than AGA and some 486/33 being able to output AGA level game graphics without any GPU help)

>>Assuming 4 controllers means 4 lanes:

There’s 8 lanes, IIRC.
(Configs for Freescale chips are not too simple, I do not yet have reference manual for T1 series. I’ve not figured out all of the possibilities, I think. At least 1*4x + 2*1x + 1*1Gbit + 1*SATA should be available, but to me the training material that I saw indicates one combined SATA/PCIe on top of that…?)

>>In the case of the custom FPGA AGA framebuffer thing, I guess bandwidth wouldn't exceed a single PCIe lane, so you'd still have another 3 to play with. If you're configuring the 4 lanes for a 4x slot for a graphics card, you might be a bit stuck for further expansion though.

For my “dream” machine, I would love to have 4x slot free for 3D GPU.

(after olegil pointed me that I had too high prices for P series chips, it seems that I/we should not much look into APM offerings with less PCIe any more. 1Ghz APM chips start from eur16 or so, while freescale chips should be available below eur50 or so)

So… perhaps the design could have miniPCIe for the AGA+ capable FPGA, another miniPCIe or externalPCIe etc, etc. plus the x4 (v2.0) for GPU.

>10 year longevity support sounds like a damn good starting point for a long term project though.

One + for freescale (vs APM).

>Depends entirely on your target market I suppose - are you aiming for a PPC RPi, or a general purpose AmigaOS desltop board at a low cost. You can't have two for the price of one.

I think what our niche now needs most desperately is very low cost board.
For me it would most likely mean mini-ITX board with physical 16xPCIe slot (4lanes) + 1…2 miniPCIe or so.
As also this thread has shown, it’s hard for engineer person to keep the design simple & cheap etc.
For me, I love to leave expansion options open even for the cheap model (like A500 and CD32 did).

So, now it seems, my minimum is:
-Dualcore 64bit 1.4Ghz (no Altivec)
-64bit SODIMM (4GB minimum)
-1*4xPCIe + miniPCIe(s) free
-1Gbit Ethernet (should look if there are some grazy usecases for bult in 8 port switch vs higher cost)
-GPIO for geeks (perhaps compact PCI connector or something else to get all I/O out from the SoC.
-USB hub to get 8 ports of USB2.0
-Some default GFX (2D) and audio (16b stereo) output would be nice for ultra low end setup (like retro game box, laptop/tablet), otherwise expansions are the way…
(and HW+manufacturing should be below eur200 per board, then we would have small change to find finacing for a good production run. I imagine/dream about mass order with ACube + A-Eon + crowd funding etc.)

If such HW project succeeds and we get some crusial OS features. I think it would enable possibility for small userbase growth and perhaps rev2 production run with some pincompatible chip (like T2) etc.

(one date that I wait for more info about T1 series)
(about T1023 chip, som T3xxx things, T1080 ? etc.)
(T10xxRDB diagrams, serdes lanes multiplexing, etc)
(freescale material, if someone has too much spare time)
btw... from uBoot revision history I spotted some notes about T10x1 chips, but otherwise I think I have not seen info about those... to me it seems thay have plenty of chip variations but not all enter mass production.

(diu stuff to read (for me))

Last edited by KimmoK on 17-Feb-2014 at 08:48 AM.
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Last edited by KimmoK on 17-Feb-2014 at 07:58 AM.

_________________
- KimmoK
// For freedom, for honor, for AMIGA
//
// Thing that I should find more time for: CC64 - 64bit Community Computer?

@Olaf25

Benchmarks I promised:

Quote:

On notebook I use right now (Core i5-2430M 2.4 GHz): Lame 5.8853x dnetc OGR-NG: 4,051,434 (lower than 440EP 666 MHz) RC5-72 3,867,526 (higher than 750GX 1000 MHz)

Now on Core i5-2500 (WinUAE):
Lame
7.8558x (440EP 2100 MHz )

dnetc
OGR-NG: 5,055,431 (440EP 525 MHz, 750GX 450 MHz )
RC5-72: 4,851,033 (440EP 1850 MHz, 750GX 1400 MHz )

Doom Benchmark (ADoom 1.3)
114 realtics (655.2 fps)
For Comparison:
Pegasos II G4 1 GHz ADoomPPC1.7, MorphOS - 97 realtics (770.0 FPS - WarpOS wrapper)
A1-XE G4 1 GHz ADoomPPC1.7, AmigaOS4 - 175 realtics (426.8 FPS - WarpOS wrapper)
A1-XE G4 1 GHz ADoom 1.3, AmigaOS4 - 486 realtics (153.7 FPS - 68k Petunia emulation)

Edit:
Speedometer 4.0 (shapeShifter Mac emulation)
CPU: 41.868 (= 68040 1.0 GHz)
Dhrystone: 104.509 (= 68040 2.6 GHz)

Last edited by pavlor on 17-Feb-2014 at 08:20 PM.

@pavlor

thanx a lot I will try to collect numbers (and do some nyself) to create a "bigger picture"

@OlafS25

Congratulations on your awesome progress in the "I'll derail every god damn POWER-related thread on Amigaworld" project.

Why the heck do I still bother coming here to discuss technical stuff when every dang thread is drowned by the same old repetition of arguments between people who aren't even arguing?

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@olegil

Word of advice, start the thread on Amigans, if your serous about a topic, Amigaworld will always be a Mix MorphOS, AROS, AmigaOS users arguing about some thing.

Amigaworld is bit like this:

https://www.youtube.com/watch?v=kQFKtI6gn9Y

Last edited by NutsAboutAmiga on 18-Feb-2014 at 10:17 AM.

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@NutsAboutAmiga

Quote:

NutsAboutAmiga wrote: @olegil Word of advice, start the thread on Amigans, if your serous about a topic, Amigaworld will always be a Mix MorphOS, AROS, AmigaOS users arguing about some thing.

That might be good advice were the topic AmigaOS related (although not very polite to Amigaworld staff to post it on their forums) but with it being about generic PPC hardare development that would just artificially limit the participants.

Also... Helgis alert.

/Imo EAB is probably the best forum for discussing homebrew hardware anyway - there's a lot of experienced hobbyists over there (must be 4 years since I last posted there though).

Sigh, I miss tinkering with the classic hardware sometimes.

_________________
Troll - n., A disenfranchised former potential customer who remains interested enough to stay informed and express critical opinions.
opp., the vast majority who voted silently with their feet.

@KimmoK

Quote:

KimmoK wrote: >>Assuming 4 controllers means 4 lanes: There’s 8 lanes, IIRC. (Configs for Freescale chips are not too simple, I do not yet have reference manual for T1 series. I’ve not figured out all of the possibilities, I think. At least 1*4x + 2*1x + 1*1Gbit + 1*SATA should be available, but to me the training material that I saw indicates one combined SATA/PCIe on top of that…?)

You probably have more in-depth and up-to-date info than the block diagram & specs I was looking at on Freescale's public pages:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=T1020

I'm probably reading the diagram incorrectly, but this appears to show 8 serdes lanes, but only 4 PCIe controllers, 2 x SATA, 4 (+1) GBe controllers (8 way hub only on T1020).

Quote:

I think what our niche now needs most desperately is very low cost board.

+1

Although as the Efika has shown, it needs to enough* power and connectivity.

(* 'enough' is about as clearly definable as the word 'Amiga')

Having only 1 expansion slot, and having to choose between wireless, graphics, USB2 or (eg) SATA to make up for the poor onboard peripherals (USB 1, slow ATA, no onboard graphics) isn't great (unless you like such a challenge of course ).

Quote:

For me it would most likely mean mini-ITX board with physical 16xPCIe slot (4lanes) + 1…2 miniPCIe or so. As also this thread has shown, it’s hard for engineer person to keep the design simple & cheap etc. For me, I love to leave expansion options open even for the cheap model (like A500 and CD32 did). So, now it seems, my minimum is: -Dualcore 64bit 1.4Ghz (no Altivec) -64bit SODIMM (4GB minimum) -1*4xPCIe + miniPCIe(s) free -1Gbit Ethernet (should look if there are some grazy usecases for bult in 8 port switch vs higher cost) -GPIO for geeks (perhaps compact PCI connector or something else to get all I/O out from the SoC. -USB hub to get 8 ports of USB2.0 [quote]-Some default GFX (2D) and audio (16b stereo) output would be nice for ultra low end setup (like retro game box, laptop/tablet), otherwise expansions are the way…

That's a major point though - why integrate graphics/sound etc into the board (where you have to do the routing, possibly adding iterations to prototyping etc) when you can go the SAFE route of adding (mini)PCIe slots.
Let the manufacturers of audio/graphics cards do all that hard work for you (and get it through EMC tests etc) on your behalf. That way you're just adding pre-approved subsystems, and all you have to concentrate on is the cpu/PCIe bus.

I know 'it works ootb with no extra cards' seems attractive, but inside the plastic box, even most routers are equipped with a mini-pci/e wireless card to offer WLAN.

Last edited by Boot_WB on 18-Feb-2014 at 02:34 PM.

_________________
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opp., the vast majority who voted silently with their feet.

@Boot_WB

Quote:

not very polite to Amigaworld staff

Not at all, Amigaworld staff is doing there best, whit people from different camps whit different opinions / views about things, some times if you ask a question to 100 people you get 100 answers. Take this thread for example some people are not interested in PowerPC future nor the roadmap, and only want to point out about other CPU options. And some people think this topic is about creating some hardware but actually its not, it is about roadmap of PowerPC.

If the moderators rote out all off topic posting, then this site will become a lot more sterile. Or they can allow some off topic posting if does derail the thread too much, too much moderation and people complain, to little and people complain, there will always be a balance.

At the end of the day, you just have to take it for what it is, a social site, where people from different camps come to have a argument and share ideas, whit out offending etch other.

Quote:

but with it being about generic PPC hardware development that would just artificially limit the participants.

Yes.. that's the point limiting to people who are interested in the topic your taking about, so this is about selecting the audience for meaningful discussion.

Quote:

Also... Helgis alert.

I don't know about Helgis but he is not posting on Amigans.net any more, you can find him on Facebook if your interested in Helgis taking about helgis.

Quote:

EAB

If it was classic hardware, then yes, but this about the PowerPC roadmap.

Anyway anything PowerPC is most likely best to decuss at the Freescale forum, but that does not cover Amiga, so Amigans or MorphZone is most likely the best sists to talk about it.

Last edited by NutsAboutAmiga on 18-Feb-2014 at 04:58 PM.
Last edited by NutsAboutAmiga on 18-Feb-2014 at 02:45 PM.
Last edited by NutsAboutAmiga on 18-Feb-2014 at 02:43 PM.

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@olegil

Quote:

I'll derail every god damn POWER-related thread on Amigaworld" project.

Sorry, that was my fault.

I only wanted to show some perspective of relative PowerPC performance, but it went too OT.

@Boot_WB

Using an AMD southbridge makes sense, as it provides more USB, SATA, PATA and PCIe ports. The T10x2 doesn't seem to suffer from the usual "stupid serdes muxing table" that hamper most recent freescale SoCs, check it here:

http://cache.freescale.com/files/training/doc/dwf/DWF13_QorIQ_Portfolio_SanJose.pdf?&Parent_nodeId=&Parent_pageType=

But with onchip graphics, 2xUSB2, 5xGbE and 2xSATA, it's also possible to imagine not using any extra chips* at all

*: GbE PHY, power regulators and a boot media would obviously help, allthough SD booting is still the smoothest

@pavlor

You not doing that again when it's OT sure would help

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@Boot_WB

Quote:

That's a major point though - why integrate graphics/sound etc into the board (where you have to do the routing, possibly adding iterations to prototyping etc) when you can go the SAFE route of adding (mini)PCIe slots. Let the manufacturers of audio/graphics cards do all that hard work for you (and get it through EMC tests etc) on your behalf. That way you're just adding pre-approved subsystems, and all you have to concentrate on is the cpu/PCIe bus.

You're going to find limitation here. While I have found a small number of (expensive!) miniPCIe cards for serial ports, parallel ports, and a couple other oddball things, I do not believe I've seen one for audio. Certainly not for graphics. It's mostly for Wifi networking or cellular data cards in actual real life. So leaving it to the miniPCIe card suppliers is not a complete answer, since they are not doing their part. And we'd have to fill in the blanks ourselves anyway.

Also realize that a lot of these miniPCIe Wifi cards are actually USB2 connections, as USB2 is a standard part of the miniPCIe connector pinout. Msata uses a mux on the slot to change from PCIe to Sata or back, sharing the PCIe link pins, but USB2 has its own pins.

I do challenge you to provide a list of links to buy several different things at reasonable prices this way.

Then, how many USB links does your CPU SoC have?

And how many PCIe links?

Not a huge number of them...

As Olegil mentions elsewhere, an AMD southbridge provides more downstream PCIe links, which are enough to replace what the southbridge itself has consumed from the CPU. It also provides more USB, plus several other peripherals that you don't have enough PCIe slots for directly from the CPU.

I'm sorry, but I cannot agree with removing the southbridge, and going CPU-only with everything else in slots. I was quite surprised and bewildered that Cyrus did that, after the X1000 proved these southbridges can work this way.

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@billt

Quote:

billt wrote: @Boot_WB Quote: That's a major point though - why integrate graphics/sound etc into the board (where you have to do the routing, possibly adding iterations to prototyping etc) when you can go the SAFE route of adding (mini)PCIe slots. Let the manufacturers of audio/graphics cards do all that hard work for you (and get it through EMC tests etc) on your behalf. That way you're just adding pre-approved subsystems, and all you have to concentrate on is the cpu/PCIe bus. You're going to find limitation here. While I have found a small number of (expensive!) miniPCIe cards for serial ports, parallel ports, and a couple other oddball things, I do not believe I've seen one for audio. Certainly not for graphics. It's mostly for Wifi networking or cellular data cards in actual real life. So leaving it to the miniPCIe card suppliers is not a complete answer, since they are not doing their part. And we'd have to fill in the blanks ourselves anyway. Also realize that a lot of these miniPCIe Wifi cards are actually USB2 connections, as USB2 is a standard part of the miniPCIe connector pinout. Msata uses a mux on the slot to change from PCIe to Sata or back, sharing the PCIe link pins, but USB2 has its own pins. I do challenge you to provide a list of links to buy several different things at reasonable prices this way.

Sorry bill, I wasn't clear - I didn't mean miniPCIe across the board (unavoidable pun, sorry), I meant PCIe/miniPCIe.

I wasn't aware of the USB2 connection used - just from my own observation I'd assumed it was a PCIe expansion.

Quote:

Then, how many USB links does your CPU SoC have? And how many PCIe links? Not a huge number of them... As Olegil mentions elsewhere, an AMD southbridge provides more downstream PCIe links, which are enough to replace what the southbridge itself has consumed from the CPU. It also provides more USB, plus several other peripherals that you don't have enough PCIe slots for directly from the CPU. I'm sorry, but I cannot agree with removing the southbridge, and going CPU-only with everything else in slots. I was quite surprised and bewildered that Cyrus did that, after the X1000 proved these southbridges can work this way.

I can see your point, and agree it would be nice to have all the extra expansion options.

I do think that a:
2xPCIe > 16x slot (GPU)
1x PCIe > expansion
1 x PCIe > PCI bridge > 4xPCI slots
along with the onboard 2 x USB2 controllers, 2 SATA controllers, and potentially a gigabit Lan (if simple enough) would be sufficient for the vast majority of people though.
Again, one has to ask how much bandwidth is likely to be a bottleneck with current/near-future GPU usage. If a 2x PCIe 2.0 link (8Gbps) is sufficient for now, why bother with a 4x or greater? To put it into perspective, that's enough bandwidth to throw raw pixel data at 32bits colour depth at 60Hz to two 1080 HD screens simultaneously (by my maths at least).

Last edited by Boot_WB on 19-Feb-2014 at 12:48 AM.
Last edited by Boot_WB on 18-Feb-2014 at 08:08 PM.

_________________
Troll - n., A disenfranchised former potential customer who remains interested enough to stay informed and express critical opinions.
opp., the vast majority who voted silently with their feet.

@miniPCIe

The most interesting things I have found for miniPCIe are:
-bridge to 2-3PCI slots (linky2)
-adapter to/for normal PCIe (linky1)
-SATA controller + 4 ports
-USB3 controller + port (link3)
-video capture cards ( http://www.commell.com.tw/Product/Surveillance/MPX-6864.htm )
-SSD drives
-USB2 controller for more ports

(there was also benchmark somewhere showing that miniPCIe to external GPU systems can outperfom laptop standard GPUs, so most likely usable when games are not the latest)


@serdes etc....

T1022 SerDes Lane Multiplexing:
Setting 06: 4 lanes to PCIe1, 1 lane to PCIe2, 1 lane to PCIe3, 1 lane to PCIe4, 1 lane to SATA1, parallelport availability 2 RGMII (FMAN MAC #4 & #5)
Setting 08: 4 lanes to PCIe1, 1 lane to PCIe2, 1 lane to PCIe3, 1 lane to SATA2, 1 lane to SATA1, parallelport availability 2 RGMII (FMAN MAC #4 & #5)

T1042RDB Block Diagram shows:
4xPCIe, 1xminiPCIe, 1xminiPCIe, 1xSATA, 2*1Gb etherner ports via RGMIIs

the "parallelport availability 2 RGMII (FMAN MAC #4 & #5)" puzzless me...
Is there 8 lanes free for PCIe and SATA use while 2*1Gb ethernet comes separately from "parallel port"?

And one PCIe lane transfers "v2.x: 500 MB/s (5 GT/s)".
It would mean 500MB/s to those miniPCIe slots.
And 2GB/s to the 4xPCIe slot.
(SAM440 has 260MB/s to GPU, SAM460 does 1GB/s, Nemo and Cyrus does 4GB/s)

Last edited by KimmoK on 20-Feb-2014 at 08:38 AM.
Last edited by KimmoK on 18-Feb-2014 at 09:09 PM.
Last edited by KimmoK on 18-Feb-2014 at 08:59 PM.
Last edited by KimmoK on 18-Feb-2014 at 08:22 PM.
Last edited by KimmoK on 18-Feb-2014 at 08:19 PM.

_________________
- KimmoK
// For freedom, for honor, for AMIGA
//
// Thing that I should find more time for: CC64 - 64bit Community Computer?

@KimmoK

Quote:

KimmoK wrote: (there was also benchmark somewhere showing that miniPCIe to external GPU systems can outperfom laptop standard GPUs, so most likely usable when games are not the latest)

That looked pretty cool (in the context of x86 at least, and using just a single portable device as a gaming PC, but that's definitely well OT here ), but seems a bit kludgy to use in a standard config.

Barring the mPCIe>PCIe adapters (why not just use a standard PCIe?), the other items above though would provide a very interesting menu for configuring systems for a variety of customer tastes though: most especially as a cheap 'off the shelf' way to offer a 3 port PCI bus without using real estate on every board.

Quote:

@serdes etc.... Quote: T1022 SerDes Lane Multiplexing: Setting 06: 4 lanes to PCIe1, 1 lane to PCIe2, 1 lane to PCIe3, 1 lane to PCIe4, 1 lane to SATA1, parallelport availability 2 RGMII (FMAN MAC #4 & #5) Setting 08: 4 lanes to PCIe1, 1 lane to PCIe2, 1 lane to PCIe3, 1 lane to SATA2, 1 lane to SATA1, parallelport availability 2 RGMII (FMAN MAC #4 & #5)

^ Are these configs offering _SerDes lanes_ for deserialising data from the four PCIe controllers in the block diagram (But then what would be the advantage of having multiple SerDes lanes for one PCIe controller when one lane (at 5GHz) can handle the everything (5Gbps) the PCIe controller can throw at it? ), or offering additional _PCIe lanes_ beyond those shown in the block diagram (if so, bonus!)?

I'm well outside my experience here, so be generous and forgive any stupid questions.

Last edited by Boot_WB on 19-Feb-2014 at 12:57 AM.
Last edited by Boot_WB on 19-Feb-2014 at 12:56 AM.
Last edited by Boot_WB on 19-Feb-2014 at 12:43 AM.

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opp., the vast majority who voted silently with their feet.

@Boot_WB

So far I have understood it so that one PCIe controller can handle any amount of serdes lanes (control signalling is only on lane0 ?). But I'm a newbie on the low lewel stuff of this degree.
(after rethinking... it seems T1 series serdes controllers can handle up to 4*5Ghz lanes maximum)

For PCIe vs miniPCIe...
For me the advantage of miniPCIe is that it can be placed more freely on a board.
(mini ITX can have only one normal PCIe slot in standard position) (image about motherboard form factors)
(Industrial boards can use non standard locations...)

Last edited by KimmoK on 19-Feb-2014 at 02:34 PM.
Last edited by KimmoK on 19-Feb-2014 at 08:27 AM.
Last edited by KimmoK on 19-Feb-2014 at 08:17 AM.

_________________
- KimmoK
// For freedom, for honor, for AMIGA
//
// Thing that I should find more time for: CC64 - 64bit Community Computer?

@Boot_WB

Why do you normally use a x16 for graphics, a x4 for a raid card and a x1 for ethernet?

Discussing things which are a LITTLE out of your field of excellence, are you?

The controllers limit is obviously somewhere between 16 and 32Gbps. those 5Gbps include 8:10 bit encoding for clock recovery, so for a x4 link you'll get 16Gbps in each direction.

_________________
This weeks pet peeve:
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@olegil

Quote:

olegil wrote: @Boot_WB Why do you normally use a x16 for graphics, a x4 for a raid card and a x1 for ethernet?

To have enough bandwidth to cover not just today's needs, but also tomorrow's (until PCIe gets superseded). I don't expect I use the full bandwidth of a 16-lane PCIe connection for anything at the moment.

If it's just going to be used for graphics, and not to do heavy maths, how much bandwidth is 'enough'?

Quote:

Discussing things which are a LITTLE out of your field of excellence, are you?

Completely, although within my fields of interest. . The design aspect in particular, since I'm often puzzled by what I would consider to be strange choices. It's usually quite enlightening to ask "why?"
(And while I do own hot air solder station, solder tweezers and a good old iron, it's a while since they've seen any use.)

Quote:

The controllers limit is obviously somewhere between 16 and 32Gbps. those 5Gbps include 8:10 bit encoding for clock recovery, so for a x4 link you'll get 16Gbps in each direction.

Got that, it's the controllers being specced as 5Gbps each that threw me. Need to do some reading rather than polluting the thread with misunderstandings.

_________________
Troll - n., A disenfranchised former potential customer who remains interested enough to stay informed and express critical opinions.
opp., the vast majority who voted silently with their feet.

@Boot_WB

I get that freescale threw you a curve ball with their phrasing

I think the reason is that they have a rather strange boundary of controller vs serdes rather than the more classic controller and PHY. The serdes is only the very last step of the physical interface, everything else is in the controller.

As for link widths and graphics, the question is never easy to answer.

Recent chips offload more and more of the 3D language itself to the chip, and therefore less and less bandwidth should be necessary. Yet bigger is better, so that's what the consumer expects.

But it's a bit telling that a x16 graphics card is about half as fast as two x8 graphics cards working together

A raid card needs the bandwidth, though. With the third SATA3 SSD added, you've already started nearing the peak throughput of a x4 PCIe 2.0. As long as you're reading (a lot) more than you write.

If I could do it and I could use billt, you and KimmoK as reference target group but get a veto for realistic implementation, I would:

1: Base it around the T1022. This has two bigger brothers, the T1042 with two extra e5500 cores and the T2081 with Altivec. Except for possible serdes lane muxing issues in the T2081 (anyone remember the 4080/5020 "pin compatible" bragging?) I don't see any downside here.

2: put in an FPGA to do an asynchronous PCIe implementation of AGA with shaders (and scalers/filters) and the ability to render both to and from texture buffers. Alpha channel mixing of multiple screens are the 16 and 32 bit version of dual playfields, so this is needed on the output. Give this a good, fat x4 pipe to the SoC. In fact, someone start on this right now. Also, Paula should get an upgrade, with at least some more channels and more bits (how about 4x8 bit 22kHz plus 8 x 32 bit 96 kHz? Keeping the original programming model. I would think the shaders could be also used for audio effects if they're both writing to CHIP RAM).

3: I honestly DO not see any use for a badly supported ATI graphics card if I've done point 2, so that goes out the window.

4: As does the Southbridge. Seriously, from that SoC you've got SATA, USB2, SDXC, serial ports and a few other whatnots. I am not completely insensitive to reason, I just don't like putting in a chip that is going to go out of production at ANY MINUTE NOW.

5: As many PCIe slots as can be squeezed out of the SoC. This probably means 2 PCIe, 1 SATA and 1 selectable PCIe/SATA. This is a LITTLE bit cramped, though.

6: CHIP RAM on the FPGA, FAST RAM on the SoC.

I'm open to discussion on point 4 and 5. With x4 to graphics and x4 to SB, you get 5 x1 from the SB, and a plethora of SATA and USB. Price is good. I'm just worried about the added complexity both in sourcing, manufacturing, design and software.

Now, the good news is that it's possible to get an eval board for the FPGA and start hacking away, it's also possible to get or make an eval board for an SB chip and start on that, AND it's possible to get an eval board for the SoC to start on that.

As such, this would actually be well within the realm of possible with a software, a hardware and an FPGA engineer cooperating. I'm not very good at FPGA, though

_________________
This weeks pet peeve:
Using "voltage" instead of "potential", which leads to inventing new words like "amperage" instead of "current" (I, measured in A) or possible "charge" (amperehours, Ah or Coulomb, C). Sometimes I don't even know what people mean.

@olegil

After quick review:
1: T1022 ok, with maximum Ghz, not overclocked
2: I would put this on a card as I would not like to limit out mainstream 3D chips.
2.1: If 1 lane PCIe would be enough for the FPGA (+eLB?), then it could be onboard if it enables getting rid of DIU-DVI "bridge" and separate sound chip.
2.2: For lowest cost system the DIU and I2S use should be studied.
3: see above
4: no southbridge onboard
(in theory user could use busboard (cabled) with southbridge etc...)
5: miniITX
I favor for miniITX and the use of kludge busboards (cabled) for more,
unless FlexATX or microATX is proven to not to be much more expensive.
6: OK, but let's see the FPGA later... (Need to function on PCIe card first anyway)
6.1: if DIU is used for ultra low end, then it's UMA there
6.2: for me todo: study what is needed if the FPGA is wanted to be able to edit the framebuffer of DIU (low priority)

7: Amount of USB2 ports. T1022 provides 2, IMO we should have hub onboard fo have more ports.
7.1: USB3 via separate PCIe card

8: GPIO I/O for HW tinkerers (and clock port fanatics, heh)

The board that goes in production should not have things onboard that can not yet be used. (risk of unneccessary cost)

If I get the permanent job that I'm working towards, I'll order the T1022RDB ASAP it is available. (should be nice board to experiment with at least...)

Last edited by KimmoK on 20-Feb-2014 at 09:54 AM.

_________________
- KimmoK
// For freedom, for honor, for AMIGA
//
// Thing that I should find more time for: CC64 - 64bit Community Computer?