WELL,


ZORRAM

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@BigD

Make mine an Op Amp.

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John 3:16

There's options for most cpu ISAs. Many have multiple Amiga-noid OSes that utilize them.
The question is pretty much redundant.
If you want to use a particular cpu then choose the relevant Amiga/Amiga-noid OS rather than dreaming of something that wont happen, and makes little difference to the experience anyway.
Theyre all in the same sort of ballpark and trade blows for advantages. If something is lacking then support getting that lacking software/feature on the CPU ISA you favor.

Or is that a little too sane and rational ?

CPU architecture doesn't seem to matter as much as branding and popularity. As an example, take a look at computer history through the view of a young journalist at CNBC.

Inside Intel’s Bold $26 Billion U.S. Plan To Regain Chip Dominance
https://www.youtube.com/watch?v=PtSSoZW19vs

https://youtu.be/PtSSoZW19vs?t=260 Quote:

So in 1985, Moore and then President Andy Grove famously fired themselves, walked out the door then walked back in and made a drastic pivot away from memory chips and toward microprocessors. This was just one year after the first Mac computer came out.

(picture of Mac shown but no mention of Motorola 68000 inside)

https://youtu.be/PtSSoZW19vs?t=293 Quote:

Intel processors were in the world's first computer in 1974 and its ground breaking x86 architecture processors were in the first IBM personal computers by 1981. It revolutionized transistor density and speed with the first 32-bit (micro)processor in 1985. It took competitor AMD 6 years to reverse engineer a similar product. Suddenly, personal computers had to have an Intel processor to be competitive.

(no mention of the first mass produced PC from CBM or the devastatingly low priced MOS 6502 competition, sounds like the 386 with 275,000 transistors was far ahead of the competition with the world's first 32 bit CPU when actually they were behind the competition like the 68020 released in 1984 with only 190,000 transistors allowing a cheaper chip rather than needing to revolutionize transistor density using a more expensive fab process to implement the fat x86 architecture)

https://youtu.be/PtSSoZW19vs?t=349 Quote:

In 2011, global shipments of smartphones started sneaking past PCs and that's about the same time Intel turned down an early offer from Apple to make crucial chips for its first iPhones.

(computers are just Apple and Intel while the architecture doesn't matter even though the fat and power hungry x86 architecture was not as well suited for mobile)

https://youtu.be/PtSSoZW19vs?t=808 Quote:

Five nm chips, the most advanced chips currently made, are highly sought after for data handling and artificial intelligence processing used in leading edge technologies like the latest iPhones, NASA rovers and F-35 fighter jets.

(All about Apple and most NASA rovers and the F-35 almost certainly used older and more specialized fab processes as they are still using PowerPC another outdated and insignificant architecture not worth mentioning)

That's the world according to the younger generations. The winners write the history books and their branding rules the world and revisionist history.

There are more fabs using relatively new processes on the way than I knew about before. There are likely at least 10 new fabs planned for the U.S. alone with most from TSMC and Intel. With 3 major fab competitors in TSMC, Intel and Samsung for newer processes and subsidies like the U.S. CHIPS Act, there should be an oversupply of fab services and strong competition. Low cost computer devices should go lower with reductions in power and improvements in performance. Imagine a Raspberry Pi at 7-14nm with double the performance and half the price it is today. Of course those off the shelf embedded PPC chips at around 40nm will be that much more outdated. It would be possible to have new PPC SoCs made but then 68k CPU cores would be more compatible, better for retro use and allow a smaller and cheaper device footprint which is also appealing for embedded use. Off the shelf ARM chips using newer processes should get cheaper too but 68k emulation is not as competitive. Fabless semiconductor design of a SoC ASIC using 68k cores looks like the best choice for an Amiga to take advantage of the coming fab service oversupply.

Last edited by matthey on 12-Aug-2022 at 08:08 PM.
Last edited by matthey on 12-Aug-2022 at 08:04 PM.
Last edited by matthey on 12-Aug-2022 at 08:01 PM.

@matthey

Quote:

matthey wrote: (no mention of the first mass produced PC from CBM or the devastatingly low priced MOS 6502 competition, sounds like the 386 with 275,000 transistors was far ahead of the competition with the world's first 32 bit CPU when actually they were behind the competition like the 68020 released in 1984 with only 190,000 transistors allowing a cheaper chip rather than needing to revolutionize transistor density using a more expensive fab process to implement the fat x86 architecture)

The 80386 implemented a fully-fledged PMMU, a military-class (approved) secure execution implemented in hardware (protected mode), unlimited 8086 virtual machines running in parallel, task/process context switch in hardware, 48-bit virtual memory: all this requires transistors, and the 68020 (alone) has no equivalents.
Quote:

Quote: https://youtu.be/PtSSoZW19vs?t=349 [quote] In 2011, global shipments of smartphones started sneaking past PCs and that's about the same time Intel turned down an early offer from Apple to make crucial chips for its first iPhones. (computers are just Apple and Intel while the architecture doesn't matter even though the fat and power hungry x86 architecture was not as well suited for mobile)

It was suited: The final ISA showdown: Is ARM, x86, or MIPS intrinsically more power efficient?

@BigD

CELL = PS3-ish?

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cdimauro Quote:

The 80386 implemented a fully-fledged PMMU, a military-class (approved) secure execution implemented in hardware (protected mode), unlimited 8086 virtual machines running in parallel, task/process context switch in hardware, 48-bit virtual memory: all this requires transistors, and the 68020 (alone) has no equivalents.

The 386 was a big improvement for those unlucky PC owners who felt walled in by 64kiB segments. Yes, a MMU comes with the myriad of confusing modes and bizarre exception behavior meant to fix the lack of a flat memory model. The changes didn't leave enough transistors for an instruction cache so expensive memory was required to be used as a cache or performance suffered. The 68020 required to buy a separate (and lower performance MMU due to it not being integrated) if it was needed but most users didn't need it including PCs like the Amiga and most embedded markets. The 68020 provided a 512 byte on chip instruction cache while still using 31% fewer transistors, having a flat memory model and still being a 32 bit microprocessor beating the 386 to market (key point from video revisionist history). The 68030 added the integrated MMU and on chip 512 byte data cache and still used fewer transistors at 273,000 than the 386 at 275,000 transistors. To look at it another way, the 68030 architecture allowed more than twice the GP registers and 1kiB of cache advantage over the 386. The 68k has significantly better code density than x86 allowing smaller caches and using less memory as well. Unfortunately, the 68k gets lumped in with the more popular x86(-64) today as an example of CISC but there are major differences. It's as bad as saying RISC-V and ARM AArch64 are similar RISC architectures when they are very different. Saying RISC-V, MIPS, SPARC and ARM Thumb2 are similar RISC architectures and saying AArch64 and PowerPC architectures are similar may not be so bad though.

Quote:

It was suited: The final ISA showdown: Is ARM, x86, or MIPS intrinsically more power efficient?

I've read and studied that article and the University of Wisconsin study it references.

Power Struggles: Revisiting the RISC vs. CISC Debate on Contemporary ARM and x86 Architectures
https://research.cs.wisc.edu/vertical/papers/2013/hpca13-isa-power-struggles.pdf

I appreciate what they are trying to do but the results are muddled due to different fab processes which the Wisconsin study tries to normalize. It's bad enough that there are major differences in design quality and only x86 represents CISC (for better and worse). Still, they did find differences likely partially due to the ISA even for high performance cores. CISC x86 usually had fewer instructions to execute, better CPI and better code density while generally coming out on top in performance. The in-order Intel Atom especially destroyed the in-order RISC ARM and competed with the OoO ARM processors. Yes, RISC needs OoO execution to compete with in-order CISC and then area and low power advantages of "simple" RISC are lost. Not only that but CISC has a performance and usually performance/W advantage with or without OoO execution. ARM processors have improved quite a bit since the article (ARM pushed in-order cores and single thread simplicity at that time while most are OoO and significantly more complex including micro-oped at the high end today). Code density has also improved as the original ARM ISA was what was evaluated then which kept instruction counts low compared to Thumb2 but destroyed code density. CISC is mostly x86(-64) today which has an improved ISA for performance including more GP registers like the 68k but significantly worse code density. The in-order x86 Atom CPU which was pretty good for mobile was quickly discarded because customers wanted better x86-64 compatibility and the successor used more power relative to the fab process and was more bloated (already over 47 million transistors for a single core in-order Atom CPU).

https://en.wikichip.org/wiki/intel/microarchitectures/bonnell

Seeing how good the low power 68060 was with 2.5 million transistors and minimal resources, it is pretty easy to expect that an in-order 68k CPU could easily beat the in-order Atom in PPA just like the 68060 beat the Pentium. I believe a 64 bit 68k can beat x86-64 by a larger margin since x86-64 leaves a lot to be desired, especially for minimizing area and power, as you know.

Last edited by matthey on 13-Aug-2022 at 02:50 AM.

Quote:

fishy_fis wrote: There's options for most cpu ISAs. Many have multiple Amiga-noid OSes that utilize them. The question is pretty much redundant. If you want to use a particular cpu then choose the relevant Amiga/Amiga-noid OS rather than dreaming of something that wont happen

Good point, friend fishy_fis!

Let's sort combinations of architectures and OS by sanity!


SANE
--------------------------------
AROS / 68K
AROS / X86
AROS / ARM
AMIGAOS 3.x / X86
AMIGAOS 3.x / 68K
AMIGAOS 3.x / ARM



SANE-ISH
---------------
AMIGAOS 4.x / X86
AMIGAOS 4.x / 68K
AMIGAOS 4.x / PPC
MORPHOS / X86


INSANE
------------
MORPHOS / 68K
MORPHOS / PPC
AMIGAOS 4.x / ARM



CHTHULHU FTAG'N
-----------------------------
AROS / PPC
MORPHOS / ARM
AMIGAOS 3.x / PPC





BYE!


/MEGA!

















* Thanks for your submission *

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@matthey

Quote:

matthey wrote: cdimauro Quote: The 80386 implemented a fully-fledged PMMU, a military-class (approved) secure execution implemented in hardware (protected mode), unlimited 8086 virtual machines running in parallel, task/process context switch in hardware, 48-bit virtual memory: all this requires transistors, and the 68020 (alone) has no equivalents. The 386 was a big improvement for those unlucky PC owners who felt walled in by 64kiB segments. Yes, a MMU comes with the myriad of confusing modes and bizarre exception behavior meant to fix the lack of a flat memory model.

Correct.
Quote:

The changes didn't leave enough transistors for an instruction cache so expensive memory was required to be used as a cache or performance suffered.

Yes, but it had enough to implement a burst-mode for memory accesses.
Quote:

The 68020 required to buy a separate (and lower performance MMU due to it not being integrated) if it was needed but most users didn't need it including PCs like the Amiga and most embedded markets.

Indeed, but a PMMU was a requirement for servers, workstations, and military markets, which were very important for Intel. In fact, it was with the 80386 that Intel had the chance enter them (with good results: even Sun incredibly designed and sold 386-based workstations).
Quote:

The 68020 provided a 512 byte on chip instruction cache while still using 31% fewer transistors, having a flat memory model and still being a 32 bit microprocessor beating the 386 to market (key point from video revisionist history). The 68030 added the integrated MMU and on chip 512 byte data cache and still used fewer transistors at 273,000 than the 386 at 275,000 transistors. To look at it another way, the 68030 architecture allowed more than twice the GP registers and 1kiB of cache advantage over the 386.

In fact, but the 386 also had some features missing from the 68030: a military-class (approved) secure execution implemented in hardware (protected mode), unlimited 8086 virtual machines running in parallel, task/process context switch in hardware, 48-bit virtual memory.

As I've said, this costed transistors to Intel. At the end we can say that Intel decided to use them for such features, whereas Motorola did it for the two small caches. Different needs, different ways to use the transistors budget.

Also performances were similar between the two processors, despite the 386 had no caches at all.
Quote:

The 68k has significantly better code density than x86 allowing smaller caches and using less memory as well.

The 386 had also a very good code density. We aren't talking about the x86-64, which is quite poor...
Quote:

Unfortunately, the 68k gets lumped in with the more popular x86(-64) today as an example of CISC but there are major differences. It's as bad as saying RISC-V and ARM AArch64 are similar RISC architectures when they are very different. Saying RISC-V, MIPS, SPARC and ARM Thumb2 are similar RISC architectures and saying AArch64 and PowerPC architectures are similar may not be so bad though.

I had the chance to talk about it in the past, here: all of them are not RISCs.

RISC, as a concept, was a complete failure, since most of its pillars were dismantled in favor of embracing... the exact complementary from... CISCs!

At most they could be called L/S architectures: that could be a good and, especially, correct term to be used, instead of RISC.
Quote:

Quote: It was suited: The final ISA showdown: Is ARM, x86, or MIPS intrinsically more power efficient? I've read and studied that article and the University of Wisconsin study it references. Power Struggles: Revisiting the RISC vs. CISC Debate on Contemporary ARM and x86 Architectures https://research.cs.wisc.edu/vertical/papers/2013/hpca13-isa-power-struggles.pdf I appreciate what they are trying to do but the results are muddled due to different fab processes which the Wisconsin study tries to normalize.

There is one RISC with a very similar process used for the Intel's Atom.
Quote:

It's bad enough that there are major differences in design quality and only x86 represents CISC (for better and worse). Still, they did find differences likely partially due to the ISA even for high performance cores. CISC x86 usually had fewer instructions to execute, better CPI and better code density while generally coming out on top in performance. The in-order Intel Atom especially destroyed the in-order RISC ARM and competed with the OoO ARM processors. Yes, RISC needs OoO execution to compete with in-order CISC and then area and low power advantages of "simple" RISC are lost. Not only that but CISC has a performance and usually performance/W advantage with or without OoO execution.

Exactly. And that's why I've reported it.
Quote:

ARM processors have improved quite a bit since the article (ARM pushed in-order cores and single thread simplicity at that time while most are OoO and significantly more complex including micro-oped at the high end today). Code density has also improved as the original ARM ISA was what was evaluated then which kept instruction counts low compared to Thumb2 but destroyed code density. CISC is mostly x86(-64) today which has an improved ISA for performance including more GP registers like the 68k but significantly worse code density.

Correct. Unfortunately AMD made a very bad job with x86-64: its code density is really poor.

However and incredibly still good enough to be competitive with other 64-bit processors, as a study from the RISC-V Talibans shown:
The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V
Quote:

The in-order x86 Atom CPU which was pretty good for mobile was quickly discarded because customers wanted better x86-64 compatibility and the successor used more power relative to the fab process and was more bloated (already over 47 million transistors for a single core in-order Atom CPU). https://en.wikichip.org/wiki/intel/microarchitectures/bonnell

47 million were used for everything: included an integrated GPU.
Quote:

Seeing how good the low power 68060 was with 2.5 million transistors and minimal resources, it is pretty easy to expect that an in-order 68k CPU could easily beat the in-order Atom in PPA just like the 68060 beat the Pentium.

We already discussed it several time: they aren't comparable, because they offered different features (plus, Motorola cut A LOT of stuff).
Quote:

I believe a 64 bit 68k can beat x86-64 by a larger margin since x86-64 leaves a lot to be desired, especially for minimizing area and power, as you know.

Indeed. But I don't know if it would beat my NEx64T, which does MUCH better than x86-64 (easy task, I know) with a preliminary result of -21% (less space) compared to it (-28% with executables generated by GCC).

And this without a real compiler: disassembling and translating x86-x64 instructions and converting them to NEx64T ones (using a peepholer to catch some patterns with 2 instructions and coverting/fusing them to a single NEx64T instruction, and also catching some sequences of instructions for function's prologues & epilogues).

@matthey

Playing Quake, 68060 wouldn't beat a Pentium (P5) since 68060's FPU is not pipelined.

68060 Rev 6 @ 100 Mhz is about Pentium Overdrive @ 83 Mhz.

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@matthey

Quote:

Inside Intel’s Bold $26 Billion U.S. Plan To Regain Chip Dominance

From https://medium.com/discourse/tsmc-the-taiwanese-titan-be0774531bb

In the 1970s and 1980s, the Taiwanese government gave the semiconductor industry strategic priority for development.

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@Trekiej

The Zilog Z80 was prolific too! I think there's one in my Game Gear!

Great topic! Just random rambling about CPUs! Obviously the Amiga is stuck on 68k!

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@Trekiej

Which CPU?

Is really the wrong question, you should ask

Which mainboard?

----

The best CPU doesn't work if you have to wait years for someone building an overpriced mainboard for it and someone else for the port of the OS.

OneTimer1 Quote:

Which CPU? Is really the wrong question, you should ask Which mainboard? ---- The best CPU doesn't work if you have to wait years for someone building an overpriced mainboard for it and someone else for the port of the OS.

Shouldn't the mainboard be as simple as a Raspberry Pi using a SoC? Doesn't the Raspberry Pi offer more functionality and performance than AmigaNone hardware with such a simple mainboard? Shouldn't the question be which SoC then?

The Raspberry Pi Foundation benefited from the increased demand for electronic devices during the Covid crisis as the use of SoCs simplified the mainboard and therefore their supply chains. The AmigaNone 1222 is still delayed and the capital investment is burning a whole in somebodies pocket, especially as inflation increased.

Last edited by matthey on 13-Aug-2022 at 10:08 PM.

@matthey: what's more funny is that it looks like the Apollo team sold something like 10000 (ten thousand!) cards. And we know that they are quite expensive for a 68K platform.

So, there's definitely MUCH MORE market on the good old Amiga platform than all other post-Amiga ones combined.

Someone has bet to the wrong horse...

@BigD

With enough Z80 we will rise to su-pwema-cy!

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John 3:16

@OneTimer1

Make my cpu a discrete cpu.
Nothing else will do.


Main board: A600 replacement with two FPGA's.

_________________
John 3:16

@BigD

Quote:

BigD wrote: @Trekiej The Zilog Z80 was prolific too! I think there's one in my Game Gear! Great topic! Just random rambling about CPUs! Obviously the Amiga is stuck on 68k!

Thank you, thank you, thank you.
I seem have a knack for stirring things up.

_________________
John 3:16

@cdimauro

Quote:

... it looks like the Apollo team sold something like 10000 (ten thousand!) cards.

Please present us a valid source for this claim.

Last time I checked those numbers, I only found a page where people could 'express their interest for Vampire boards' this counter was ~4700 and three of those 'interests' where placed by me. But the Apollo fans took this number as real, and where bragging about 5000 customers.

If you knew how production works and how [s]many[/s] few of this boards seemed to be sold, you would be more careful presenting those numbers.

@OneTimer1: it was reported on a recent thread on EAB.

There was grond writing there, which is an Apollo team member AFAIR, that haven't denied it.