@anarchic_teapot
Quote:

Don't try to contact them for a question it's your dealer's job to answer. Same applies to Eyetech: they're far too busy as it is without doing someone else's job for them.

Some dealers are not very good at getting back to people in a timely manner. There have been many reports of slow dealer responses so I'm not too surprised these people decided to bother part manufacturers and such.

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ExecSG Team Lead

@wegster

The PDF on the Teron mini mentions "support up to 1GB" and "support different size of memory modules: 128/256/512Mb SDRAM SODIMM modules"

So you can probably forget looking for any 1GB modules. I read the above as saying that 512 Mb is the max for a slot.

I agree that you should try with a dealer first. Why not the one you bought your board from?



Edit:
Teron mini PDF

Last edited by Steff on 31-Jan-2005 at 04:26 PM.

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@Steff
Steff- thanks for the link to the PDF, got it. The chipset is in theory supposed to support up to 2GB, so there shouldn't be any issues if a 1GB SODIMM were to be located...although one hasn't been as of yet.

(and still waiting on uA1, _supposed_ to ship on Monday now..)

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Are we not done with the same silly arguments and flames yet??!

Here is a link to a 1GB SODIMM. The TIbooks use them.

http://www.meritline.com/sdramforappo4.html


EDIT: My mistake, this looks like its 2X 512MB when I look at it now.

Last edited by Acill on 12-Feb-2005 at 12:59 AM.

@wegster

Doesn't look like 1 GB PC133 SODIMM memory is available. Must be a discontinued item and if they were ever manufactured must have been a rare item. Can't find any technical info on google or listings on any auction sites.

@Acill

Read again, that is a link for two 512mb sodimm and not one 1gb sodimm.

Quote:

Edit: Teron mini PDF

It appears there are some errors/omissions in that PDF, take a look at the supported operating systems.

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@Darth_X

Quote:

Darth_X wrote: Quote: Edit: Teron mini PDF It appears there are some errors/omissions in that PDF, take a look at the supported operating systems.

Are You talking about the "fact" that they don't support Linux?

remember that the Teron mini is no AmigaOne, so it does not support AmigaOS.

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hnl_dk - Henning Nielsen Lund [Denmark]

Please send no PM to me, email me if you want to contact me. See you somewhere else.

My MicroA1 has a 256MB ram made by apacer ... so i guess when you have a 512 MB ram made by apacer there isn't going to be much of a problem ... or am i wrong ?

@wegster

Any updates about Mai contact info yet?

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@wegster

I obtained my 512MB ram from AmigaKit. Works fine. Can't help on the Mai request.

TrevorDick

(ps. still no futher forward on other issue)

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No, I don't need no reason, I'm just breezin'

Anyone who knows what ever happened to MAI Logic ?

Did they just dissolve, did they go bancrupt, were they bought up, or what?

also, regarding the pdf-documents and other useful stuff, are they gathered somewhere?
Like with the Linux kernels, we managed to save the YDL-installer to Intuitionbase.

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Site admins are people too..pooff!

@tomazkid

you just bumped a 3 year old thread!

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Men who have girlies in their avatars are Girliemen!

@Darth_X

Yep, would like to gather those pdf-document to one place.

_________________
Site admins are people too..pooff!

@Darth_X

I think he is aware of that.

@tomazkid

Most of the docs are around is various hands.

Adam had indicated that the ArticiaP was put in some other boards after they retreated to China, iirc.
I found a listing once over there for some parts that matched ours.
IBM still listed them (MAI) as a partner last I checked. But, as ssolie says, who cares about websites?

#6

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@tomazkid

Don't know about documents, but I found this in a Google search:
http://dockets.justia.com/docket/court-candce/case_no-3:2004cv05498/case_id-26775/

Looks like they got sued, but so far I can't find any information about what happened with that case. The Justia page has no docs on it and refers you to the California court's Pacer page. Unfortunately that's not truly public, as they require logins and charge by the page for access.

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This posting, in it's entirety, is the opinion and/or statement of the author and does not reflect the views and/or position of this site.

@DWolfman

IF that's the Socle case, then I would surmise "breach of contract", and for good reason.
Socle was another IBM partner, btw.

Imagine that...partners suing each other. Who'd a thunk such a thing could happen?

Bah! spelling...

#6

Last edited by number6 on 21-Jul-2008 at 01:02 AM.
Last edited by number6 on 21-Jul-2008 at 12:54 AM.

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@all interested

Here is the text of a letter delivered to Mai Logic some time ago...

LAW OFFICES OF XXX
101 XYZ Street
San Jose, CA 95125
(408) XXX-XXXX

Delivered by Hand
October 2, 2002
Mr. Jason Hou
Chief Executive Officer
Mai Logic Incorporated
47697 Westinghouse Drive
Suite 200
Fremont, CA 94539

Dear Mr. Hou,

The purpose of this letter is to inform you that I have been appointed by the controlling shareholders of bplan Gesellschaft für Planung und Fertigung elektrotechnischer Baugruppen mbH, Georg-Wolff Straße 8, 60439 Frankfurt , Germany to represent them in some exploratory discussions with you and your Company. These discussions must occur immediately. As you know, bplan is a customer of your Articia chipset and recently ordered 1000 units from Mai. Simultaneously, bplan has ordered all the other necessary components required to produce 1000 Pegasos mainboards. These shipments are arriving daily. Our initial discussions are to be focused on the unexpected failure of the Articia chipset. This failure has delayed our production, the sale of that production and our development in general. bplan’s potential economic loss is significant.

Last week bplan has sent the records of signals found at the PCI/CPU bus during chip failure to their technical contact person at MAI Logic, Mr. Peng Yau. These records clearly document chip failure. This failure has been reproduced and acknowledged by the Mai personnel. This failure was recorded with the bplan board, the Pegasos, as well as with the TeronCX (with the newest chipset mounted therein) your company provided to bplan earlier last week. Both systems show the same crash condition. This crash condition leads to two different behaviors of the greater system:

1) Data Corruption -- this leads to erratic behavior of peripherals (in most cases networking products). This is related to the principles of operation of such devices (control flow software/hardware).

2) Articia Crash – the Articia enters into an internal endless loop. This crashes the computer, which must be reset to begin operation again. Needless to say, this is not a desirable characteristic for a production system.

In both cases the crash conditions take place with a chance of approximately 1:10.000.000.000 during a bus master access. Depending on the program or combination of programs running, we can reproduce the error within five minutes (minimum) and up to five hours (maximum) with very random behavior. This makes the failure very hard to observe with a live system. bplan has devoted significant time and resources to setup a test environment to record this failure.

bplan has developed and built an external circuit to trigger on a valid error condition. It is also possible to simulate the failure by using the information supplied with the record of the bus signals. Fortunately, this information can now be applied to the timing model generated from the chip design tool you have. This would be done to:

1) Develop an external patch circuit to get the current boards running properly

and/or

2) Apply an ECO (design change) to the current chip to solve the problem at the place the error occurs.

If these difficulties were not enough another defect has been discovered this week. When the CPU reads an instruction by a PCI target, it enters into an endless due loop. This occurs because the PCI master attempts to access the memory and as both PCI master and target are located at the same device the failure occurs. There is only one CPU bus.

1) The CPU starts transaction and thus marking the CPU bus busy.
2) The PCI target terminates with retry.
3) The PCI master begins to send instructions to the memory.
4) Articia terminates the master with a retry – the CPU bus is still busy from pending but retried read.

This happens when any PCI device that answers read/write access with a retry while there are outstanding data transfers from the PCI master located at the same device (chip). The most relevant examples are network devices and USB devices, which you will undoubtedly agree are essential to the success of this product.

We think this problem could be solved at 2) above if the Articia can make the PCI retry public to the CPU bus instead of handling it internally at the PCI bridge. Making the instruction public will break the busy condition of the CPU bus and allows the PCI master transaction to take place (and finally solving the retry reason of 2).

This is a general design problem of the Articia chip. This is not a bug within an implemented functionality. This means it can not be covered by external signal patching as this case is generally not built into the chip. This is a fault that should have been discovered in testing before commercial release.

It is now, this week, in the interest of both companies to correct this failure as soon as possible. As this failure must be found in all MAI’s products currently being produced and sold today, it is in our vital interest to get this problem resolved ASAP (days not weeks). Having a large number of useless systems out in the market will create many more difficulties for Mai and for bplan. For example, you will already find the Pegasos featured on these websites in the countries indicated:

Germany http://www.vesalia.de
Germany http://www.kdh-shop24.de
France http://www.aps.fr
France http://www.pegasos-france.com
Spain http://www.amigasuperbit.com
Italy http://www.virtualworks.it
Holland http://www.compcity.nl
Poland http://www.pegasos.pl
Sweden http://www.ggsdata.se
Suisse http://www.pegasos-suisse.com
Denmark http://www.kiwimultimedia.dk

bplan feels it can be instrumental in correcting these difficulties and would like to find an immediate and constructive solution to the difficulties created by the Articia chip failure. The core engineering team at bplan has been working with the PPC since 1994 and can provide invaluable recommendations for chip improvement and bug testing. Finding a short-term solution quickly may create a very positive and permanent mutually beneficial longer-term relationship.

We suggest that all required technical personnel from Mai be made available today for a conference call as soon as possible. Further, if required, key bplan personnel are prepared to arrive in Mai’s California offices this Friday, 4 October and work through the weekend.

My clients are very concerned about Mai’s ability to cope with these problems and hope that Mai will do everything in its power to support the product it sold to bplan with these inherent faults and defects. These problems make this product unacceptable for its intended purpose. My clients will fully and immediately employ their extensive resources to support a constructive joint process to resolve these problems if Mai will demonstrate it’s own commitment to the same. Anything less than your best, will do a disservice to yourselves and bplan. My clients prefer to work with you rather than prosecute their legal options to recover their economic losses. Can we work together and resolve these problems?

We look forward to your immediate response.


Sincerely,

XXX*

*Lawyers are needed when you discover you are working with crooks...

We may post more details in the future. Of course, this situation led to the April patches and the Pegasos 2. If the community had been more cohesive the Mai Logic folks might not have found other collaborators and consequently, more victims of their deceit.

Kind regards,
R&B

_________________
genesi

@DWolfman

Quote:

The Justia page has no docs on it and refers you to the California court's Pacer page. Unfortunately that's not truly public, as they require logins and charge by the page for access.

Which is still fully public, given that anyone can get a login...

Anyway --- Socle sued MAI for non-payment, MAI defended, claiming payment was made in full, and countersued, claiming extortion and IP misuse by Socle. Socle dropped their suit, MAI started screaming "Oh no, you don't! At least not without our countersuit going forward" (Socle having no reason to submit to California law other than having brought their suit it the first place), and the court agreed. Things dragged on, and eventually, MAI too dropped their countersuit. Some squabbling over depositions made for an extra twist in the end.

I.e. nothing whatsoever happened, except for lawyers getting richer.

@umisef

Interesting...
Given the story that Socle (responsible for the ArticiaP) produced a bad 1st spin, followed by MAI taking said job to the IBM Fishkill Plant instead.

Tie in or no? Hmm...I think that's obvious.

Checking some other info..

Seems Socle was technically MAI's parent company. They wanted the IP for ArticiaP, which belonged to MAI, who developed it. (is this sounding familiar or WHAT?). The "techniques" used by MAI on the P were of value and production cost was viewed as extraordinarily cheap. MAI saw the S as merely "proof of concept".
During all of this Tundra was brought in, in an attempt to acquire the MAI IP.
Tundra, however, was already far along with the Tsi108 and talks ended.

#6

Last edited by number6 on 21-Jul-2008 at 01:11 PM.
Last edited by number6 on 21-Jul-2008 at 02:03 AM.

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This posting, in its entirety, represents solely the perspective of the author.
*Secrecy has served us so well*