The riddle:

"Alive without breath,
As cold as death.
Never thirsty, ever drinking,
All in mail, never clinking."

Certainly sounds like a fish, but a particular kind of fish - the kind that has to keep moving all the time to force water through its gills, since it can't breathe by itself.

It's also the name of a project that we all thought was dead and buried - The Shark!

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cheers
tony

Hyperion Support Forum: http://forum.hyperion-entertainment.biz/index.php

@Tomas

Wrong thread for this (maybe start new one?)... it maybe legal but wrong in conseptual level.

@Zardoz

could the fpga and/or the xmos chip be used with the HTX3 connector to make some sort of vga riser expansion for cheap video output, instead of a PCI/PCIe gfx card? can make a thin client f.ex

just thinking of random ideas

Last edited by Derfs on 04-Jan-2010 at 11:08 PM.

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@AmigaBlitter

Quote:

i suggest to zoom the image and note some identical things.

Eh? Clarify please, the two boards look nothing like to me and I have trouble spotting any common parts at all. Besides, are PA.Semi parts available nowadays? They got bought by Apple ages ago.

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@Kronos & everyone
From wikipedia
Quote:

In the early 1980s, conventional CPUs appeared to reach a performance limit. Up to that time, manufacturing difficulties limited the amount of circuitry designers could place on a chip. Continued improvements in the fabrication process, however, removed this restriction. Soon the problem became that the chips could hold more circuitry than the designers knew how to use. Traditional CISC designs were reaching a performance plateau, and it wasn't clear it could be overcome. It seemed that the only way forward was to increase the use of parallelism, the use of several CPUs that would work together to solve several tasks at the same time.

Quote:

Ironically, additional internal parallelism has been the driving force behind improvements in conventional CPU designs. Instead of explicit thread-level parallelism (such as that found in the transputer), CPU designs exploited implicit parallelism at the instruction-level, inspecting code sequences for data dependencies and issuing multiple independent instructions to different execution units. This is known as superscalar processing. Superscalar processors are suited for optimising the execution of sequentially-constructed fragments of code. The combination of superscalar processing and speculative execution delivered a tangible performance increase on existing bodies of code - which were mostly written in Pascal, Fortran, C and C++. Given these substantial and regular performance improvements to existing code there was little incentive to rewrite software in languages or coding styles which expose more task-level parallelism.

Quote:

The fundamental transputer motivation remains - but was masked for over 20 more years by the repeated doubling of transistor counts. Inevitably, microprocessor designers finally ran out of uses for the additional physical resources - almost at the same time as technology scaling began to hit its limits. Power consumption and therefore heat dissipation requirements are making further clock rate increases infeasible. These factors are leading the industry towards solutions that are little different in essence from those proposed by INMOS. The most powerful supercomputers in the world, based on designs from Columbia University and built as IBM Blue Gene, are real-world incarnations of the transputer dream. They are vast assemblies of identical, relatively low-performance SoC chips. Recent trends have also tried to solve the transistor dilemma in ways that would have been too futuristic even for INMOS. As well as adding components to the CPU die and placing multiple dies in one system, modern processors increasingly place multiple cores in a single die. The transputer designers struggled to fit even one core into its transistor budget. Today designers, working with a 1000-fold increase in transistors, can now typically place many. One of the most recent commercial developments has emerged from XMOS, which has developed a family of embedded multi-core multi-threaded processors which resonate strongly with the transputer and INMOS.

Last edited by ChrisH on 04-Jan-2010 at 11:13 PM.
Last edited by ChrisH on 04-Jan-2010 at 11:12 PM.

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@Thread

The MPC8641D fits the bill pretty well methinks.

Quote:

The device has dual 64 bit (72b with ECC) DDR2 memory controllers to match the bandwidth requirements of the two cores. The memory controllers can be assigned to each core for increased OS isolation, or can be shared between the cores to ensure the most efficient usage of the memory bandwidth. ... These processors support up to 8 out-of-order instructions on the system bus that allows for making forward progress even while waiting for previous instructions to finish (ie, access to main memory required). ... There are two flexible high-performance I/O ports. Dual 8-lane PCI Express ports leverage PCI legacy with a high-performance serial point-to-point link that is commonly used to connect to a variety of other on-board high-performance devices. The 4-lane serial RapidIO port, with its low software overhead, configuration simplicity, hardware error correction, and support for both memory mapped and packet-based transactions, is very well suited as a backplane interface. ... There are four Ethernet controllers, supporting 10 Mbps, 100 Mbps, and 1000 Mbps. ... The MPC8641D supports flexible software implementations: symmetric multiprocessing (SMP) and Asymmetric multiprocessing. With SMP, one operating system runs on both cores, but from a programming perspective, it appears that the developer is writing a program for a single core. With Asymmetric multiprocessing, two instances of the same operating system or two entirely separate operating systems can be run on the two cores, largely unaware of each other. ... [except for X?]

The RapidIO x4, operating at ...
Quote:

RapidIO serial links can be driven at different baud rates. RapidIO 1.2 and 1.3 support 1.25, 2.5 and 3.125 Gbaud rates. RapidIO 1.2/1.3 support x1 and x4 link configurations, for a maximum rate of 12.5 Gbaud which equates to a 10 Gbps data rate when 8b/10b encoding is removed. With RapidIO Gen 2, 5 Gbaud and 6.25 Gbaud rates are added. The RapidIO Gen 2 specifications support x1, x2, x4, x8 and x16 link configurations.

might provide a suitable interface for XCore
Quote:

The switch of the G4 ... [has] 16 external links can transport up to 400 Mbits/s (bidirectional) [each = 6.4Gbit/s]

...fits the bill well...

[EDIT 1: Incompetent cut'n'pasting]
[EDIT 2: Added info on RapidIO]]
[EDIT 3: Cleaning up after 1 and 2]
[EDIT 4: mistakes...]

Last edited by Boot_WB on 04-Jan-2010 at 11:41 PM.
Last edited by Boot_WB on 04-Jan-2010 at 11:37 PM.
Last edited by Boot_WB on 04-Jan-2010 at 11:35 PM.
Last edited by Boot_WB on 04-Jan-2010 at 11:12 PM.

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opp., the vast majority who voted silently with their feet.

Ok, here is my wild guess.

A single core PPC processor as the main processor which drives some
multiprossor chip like XMOS or similiar. Xena is a programmable chip which acts as some sore of abotrator between the multiprossing chips and can be customized / controlled via a program residing on a CF card in the CF card slot.

Hey, I had to get one guess in before the anwser provided.

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@ktadd
Rogue has already told us (albiet indirectly via logic) that it is a dual-core PPC processor.

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Will we get a cluster (20? ) of Xena chips on a card that goes into the Xorro slot?

Last edited by Ancalimon on 04-Jan-2010 at 11:31 PM.

@ktadd

Quote:

A single core PPC processor as the main processor which drives some multiprossor chip like XMOS or similiar

This seems more affordable if nothing else

@ktadd

Quote:

Ok, here is my wild guess...

This actually sounds realistic to me, although like others, I'm not clear on the application that would motivate this type of architecture. Perhaps, however that is the whole point -- to keep it open, as the clues suggest.

@Derfs

Quote:

Derfs wrote: @Zardoz could the fpga and/or the xmos chip be used with the HTX3 connector to make some sort of vga riser expansion for cheap video output, instead of a PCI/PCIe gfx card? can make a thin client f.ex just thinking of random ideas

If that is an HTX3 connector as I suspect then you can pretty much do whatever you want with it. HyperTransport connectors allows plug-in cards to be developed which support direct access to a CPU and DMA access to the system RAM.

And the "FPGA" could just be a Xilinx HyperTransport interface

Last edited by BinoX on 04-Jan-2010 at 11:25 PM.

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@DoodooHead

Quote:

@Geennaam To quote The Big Book Of Amiga Hardware: "Commodore Transputer Amiga 2000: This is a Transputer card developed for the Amiga by Commodore Braunschweig. A transputer is similar to a computer but is designed for massive parallelism unlike conventional computers which generally work in a serial manner. The card uses transputers designed by InMOS and was designed to run a unlike-like operating system called Helios. Unfortunately Commodore stopped the project in the late stages. " It is beyond computing, it's transputing.

I was wondering when someone would remember the Amiga Transputer card. Good work!

Quote:

ChrisH wrote: @ktadd Rogue has already told us (albiet indirectly via logic) that it is a dual-core PPC processor.

Hmmm.....did he? I could be wrong and missed something but as I remember it he said one of 1, 2 or 8 was correct. I also remember him saying something to the effect of it not being multicore in the way we think of multicore which leads me to think more along the parallel processing line of thinking. Can you point to where he specifically said it was dual core? I very well could have missed it.

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@AndrewKorn

Quote:

I was wondering when someone would remember the Amiga Transputer card. Good work!

Hmm, is that XMOS confirmed then?

Last edited by Radfoo on 04-Jan-2010 at 11:32 PM.

@Ancalimon

Quote:

Will we get a cluster (20? ) of Xena ships on a card that goes into the Xorro slot?

Kind of remains me of AA consept. That would be cool.

@all

http://www.osnews.com/story/22684/Episode_30_I_Wonder_What_the_Children_Would_Be_ There is few word about Amiga, Thom's last spontanious comment at end of postcast ;)

@ktadd Quote:

Hmmm.....did he? I could be wrong and missed something but as I remember it he said one of 1, 2 or 8 was correct. I also remember him saying something to the effect of it not being multicore in the way we think of multicore which leads me to think more along the parallel processing line of thinking. Can you point to where he specifically said it was dual core? I very well could have missed it.

I'm paraphrasing, but he told us the CPU was a PPC chip. He told us it was a multi-core chip. He told us it was 1,2 or 8 core. And he said it was not 8 core. Logically that leaves only 2 cores!

Although there is a small possibility that he might have been talking about the XCore chip (or whatever X is) in one of those cases. Someone would need to check exactly what he said to be sure he wasn't.

Last edited by ChrisH on 04-Jan-2010 at 11:41 PM.

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It is pitch black. You are likely to be eaten by a grue...

STRICQ wrote:
Quote:

Quote: To follow, begin where Nemo entered into a rage 20,000 Leagues: Slave Ship? (From previous posts, never read it myself.)

20,000 Leagues indeed. Think about the "where" -- you're looking for a place. Guesses so far seem to be generally ignoring the "rage" part.
Quote:

Quote: Then add to that what the Phoenicians used to see Northern Star, Pole Star, Polaris? Cyprus? Greece?

What do you use to see?
Quote:

Quote: My whole was born in a place where a Celtic river was by Saxons, crossed Bristol? London general vicinity?

This one has already been cracked, but for confirmation, find out what "river" is in Celtic (Welsh will do great, do need to dig up your Brythonic-English dictionaries).

Quote:

We also have references to the Titans of Greek Mythology, giants, and a "giantkiller" (David and Goliath?)

I'm going to take a crack at this one, and suggest that "giantkiller" is so named because it is a task designed to stress a CPU. It's not part of the puzzle, nothing to see here. ;^)

@AndrewKorn

Quote:

20,000 Leagues indeed. Think about the "where" -- you're looking for a place. Guesses so far seem to be generally ignoring the "rage" part.

The Straits of Torres?

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Amiga user since 1985.

@AndrewKorn

Rura penthe?

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AmigaOne X1000