@Hammer

Quote:

Hammer wrote: @cdimauro Quote: @cdimauro Already discussed about it. And already answered. Hint: DISCUSSIONS about how to enhance the Amiga with 256 colours from 16 million colours started on September 1987 (after Apple's Mac II and IBM's VGA), and this requires time. AFTER the technical discussions (which are needed), THEN the implementation is needed, which requires time as well. Wrong. Hint: the R&D implementation's "go ahead" from Henri Rubin is required e.g. Henri Rubin's AA R&D implementation approval is during Sep 1989. Jeff Porter can argue for "8 bitplanes with 16 million colors" in 1987 which amounts to nothing burger until Henri Rubin's R&D implementation approval in Sep 1989.

Should I recall you what YOU have reported about the such engineers which were NOT able to take a decision on how to evolve the Amiga chipset?

Yes, the go ahead came after two years... of such discussions.
Quote:

Quote: @cdimauro VRAM = professional and very expensive graphic cards -> Not needed for the Amiga. DRAM was enough 'til '92. After that, VRAM could have been considered, because their cost greatly reduced -> an option for the Amiga. Wrong narrative. FP DRAM was enough when the implementation included multiple memory controllers with memory interleave e.g. ET4000AX to W32 series.

Which was more than enough for the vast majority of PC graphic cards.
Quote:

Commodore didn't master memory interleave, hence the VRAM direction.

Not needed: the FP mode allows to saturate the bus.

Whereas the VRAM was an option for the FUTURE high-end AAA systems.
Quote:

1988-era Super A500's expensive issue was mixed up with $77 68020-16 along with $100 1 MB VRAM.

?!? What you're talking about now? The A1000+?
Quote:

Commodore tolerated the $50 cost for A1200's FP DRAM (cite: Commodore_Post_Bankruptcy pdf).

In the past you've reported that $50 was the impact for the cost of 8MB to the final price to the users, if I recall correctly.

So, $50 are now the cost to Commodore for 2MB of FP DRAM. OK, and how much is the cost of 2MB of VRAM on '92-93?
Quote:

Game consoles selected small VRAM storage for aggressive cost control while delivering VRAM performance at certain game resolution targets. VRAM sizes Nintendo SNES = 64 KB Sega Mega Drive = 64 KB 2D game consoles such as SNES, Mega Drive, and Neo Geo implement discrete video memory bus separated from system memory bus. Stock Amiga 500's UMA already lost against the mentioned game consoles on memory bandwidth.

Do you know why those consoles have only such a limited amount of VRAM? Hint: they work completely different, since all their assets stay in... super fast ROM.

Do you know how the Amiga work? Hint: the ROM is only for a good part of the OS, but everything else stay in the DRAM.

Result: Amiga and consoles work in completely different ways. Hence: their needs are different. Logical conclusion: what you've reported about the console's usage of VRAM is totally irrelevant.
Quote:

Quote: @cdimauro Irrelevant, off-topic: time ranges 'til '94 (Commodore's bankrupt). when Commodore can tolerate $52 for A1200's 2MB FP DRAM. It's relevant for hybrid UMA ideas for 1993 released 3DO (designed in 1992) and modern-day game consoles. Like 3DO's MADAM, Amiga Hombre's Natalie has a hybrid UMA with FP DRAM and VRAM access.

Guess what: like the Amiga with Chip and Fast RAM...
Quote:

Quote: @cdimauro And the chipset made use of the Fast Page mode (AKA: read the data from the same opened RAM page) -> double the bandwidth. Again, AA Lisa has access to around 140 ns read/write rated FP DRAM which is 7.1 Mhz effective. Lisa's 64-bit fetch is wrapped in two sequential 32-bit transfers.

Indeed, and?
Quote:

For Alice, A1200's FP DRAM improves the 1985-era 16-bit Blitter.

ROFL. We've recently talked about the SAME argument! Still NO, such FP DRAM changes NOTHING to the Blitter!
Quote:

Your counter-argument is meaningless since I already know about Fast Page DRAM mode.

Are you sure? My argument was about FP DRAM which DOUBLED the effective memory bandwidth. Now, show me how the Blitter made use of it!
Quote:

@cdimauro The DSP? It was NOT needed, as already proved. More to come on the next article.

Why the anti-DSP?[/quote]
Because, and as I've said multiple times AND proved, it was NOT needed.

You never answered to this question which I've asked you time ago, and which I repeat again: did the PCs had a DSP integrated?
Quote:

Did you know the Amiga Blitter has a rudimentary ALU?

I don't reply to rhetorical questions.
Quote:

3DO's 3D DSP is an in-house

In-house for AT&T: NOT for Commodore.
Quote:

matrix math co-processor design that is fed like Akiko's C2P i.e. ARM CPU writes to matrix math co-processor's registers and watches for competition status register.

And like the SNES...
Quote:

The lack of DMA for 3DO's matrix math co-processor is due to compressed R&D time.

That's strange, because 3DO has already DMA channels. Anyway, it was their problem. Like it was for Akiko for Commodore engineers.
Quote:

DSP is a custom math chip for a target workload like any other custom chip.

Guess what: like the chips of the Amiga chipset...
Quote:

3DO has no problems delivering arcade-quality strong 2D Super Street Fighter 2 Turbo.

RI-ROFL: it's a 2D! 2D! 2D game! You do NOT need a super expensive DSP to make a game like that!

The 14Mhz chipset which I've shown on my last article was way more than enough to make a perfect port of such games. WITHOUT any DSP, of course.
Quote:

When 3DO's matrix math co-processor @ 25 Mhz and texture mapper @ 25 Mhz hardware are used, 3DO can run Tomb Raider. https://www.youtube.com/watch?v=vscj6y6oNac Tomb Raider comparison between 3DO Vs PlayStation. The Tomb Raider port on 3DO is pushing to its limits. PlayStation still has faster results. PlayStation's hardware was designed by mostly 3rd parties i.e. LSI (R3000A CPU, MIPS-based GTE matrix math) and Toshiba (GPU which includes texture mapper, raster, and display). Ken Kutaragi provided the leadership to combine hardware components and game developer relationships.

OK, and that was about the right time to introduce some 3D support.
Quote:

Amiga Hombre's Natalie Blitter IP was modified for texture mapping fill and raster operations processing.

That's the right direction. You'll find a preview of something similar on my next article, and the consolidation of the concept on the one which follows it. WITHOUT requiring DSPs and new chips: Amiga retains its identity.
Quote:

Custom PA-RISC with 3D extensions provides matrix math and game logic compute power.

Like MMX for Intel, and then SSE.
Quote:

For DSP3210, math libraries can abstract the math functions.

Not needed until Commodore time. Exactly like PCs have not needed them.
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@cdimauro 1995..1996 -> outside of the context.

Wrong. PSX was fully operational in December 1993 which shows Namco's Ridge Racer.[/quote]
But not production-ready.
Quote:

Sony was waiting for the launch games in 1994 and 1995 releases.

You confuse early developer machines with production readiness. Care to show that Sony was production-ready on December 1993?
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Your retail release argument is NOT consistent with your arm-chair tech leadership.

Care to PROVE that I was talking about the retail release?

Because I've said something different, eh!
Quote:

You're a hypocrite.

No, I'm one which has written something that YOU have NOT understood. As usual, with you.

When do you plan to first UNDERSTAND what people write BEFORE replying?
Quote:

PSX's hardware IP and design was before December 1993's Namco's Ridge Racer demonstration for 3rd party game developers.

DE-MON-STRA-TION. Right. Thanks for having reported it yourself...

@cdimauro

Quote:

@cdimauro Should I recall you what YOU have reported about the such engineers which were NOT able to take a decision on how to evolve the Amiga chipset? Yes, the go ahead came after two years... of such discussions.

The forum's persistence enables non-real-time posted comments.

Quote:

@cdimauro Which was more than enough for the vast majority of PC graphic cards.

The majority of 1990 to 1994 PCs with VGA wasn't limited by stock A1200's shared memory bandwdith. Since 1992, Intel has a 486 revenue majority. AMD captured the 386DX market via Am386-40.

The "22 percent of VGA 1991" Tseng Labs has extra tricks to speed up FP DRAM and it's not limited to A1200's 80 ns access/140 ns read-write cycle FP DRAM.

ET4000 can exploit faster 70 ns to 50 ns access FP DRAM e.g. ET4000W32I demands 50 ns access FPM.

For 41c16257 FP DRAM example
https://pdf.datasheetcatalog.com/datasheets2/77/778772_1.pdf

35 ns access FP DRAM model has a 60 ns read/write cycle time which is 16.66 Mhz effective.
50 ns access FP DRAM model has a 90 ns read/write cycle time which is 11.11 Mhz effective.

Commodore has access to a discounted $20 extra for 8 MB RAM on top of 2 MB RAM's
$50 baseline price.

The "read/write cycle time" target is a major factor in Lisa's memory timing design.

The potential compromise is to go wider memory bus (e.g. 64-bit 50 ns FP DRAM) with cheap FP DRAM instead of AAA's costly 64-bit VRAM.

Quote:

@cdimauro Not needed: the FP mode allows to saturate the bus.

It's still needed to hide latency.

ET4000 has two 16-bit FP DRAM memory channels for Interleaved memory.

Quote:

@cdimauro Whereas the VRAM was an option for the FUTURE high-end AAA systems.

You've framed your argument as an outsider.

AAA was canceled due to a lack of 3D FUTURE.

AAA's R&D implementation started in June 1988.

From Commodore - The Final Years,
Quote:

In June 1988, James Redfield began the detailed AAA architecture development, with a new engineer named Bob Schmid joining his efforts in August. They formed a plan to improve the video (Denise), sound (Paula), and blitter (Agnus) chips for the Amiga, which they called the AAA chipset. (skip) AAA Specs Before the engineers could begin work on the AAA chipset, the team had to clearly define the specifications. Not only did the chips have to match VGA standards, they had to have the ability to exceed them. It was hoped the chipset could be used in projects for 4-5 years after it was eventually released in 1990. (skip) The original Amiga team continued consulting as the specs developed. “Dale [Luck] was consulting on the software,� says Dave Haynie. “Jay [Miner] and a couple of other guys were doing chip consulting. (skip) In 1988, Linda was initially specced for 640 x 480, 800 x 600, and a whopping 1024 x 800 resolution (later reduced to 1024 by 768). These resolutions would keep up with the new SVGA standard. So far the plan sounded good. Like the original Amiga chipset, AAA was ostensibly designed to scale so it could be built into a variety of devices ranging from video game consoles, arcade machines, lowend computers, and high-end workstations. (skip) This new chipset would need to work with Video RAM, plus less-expensive 32/64 bit DRAM. (skip) AAA Progress James Redfield would now lead the development of the four AAA chips. If all went according to his schedule, the team would have working silicon by early 1990. Initially there were six other chip designers working on the chipset: Bob Schmid, Jeff Dean, Paul Anderson, Terry Hudson, Glenn Keller, and Victor Andrade. In the past, Commodore had required two engineers per chip; one designing and one simulating and testing the designs. With only seven engineers total, another key chip designer was soon added to the team in early 1989 for the most complicated chip of them all

AAA's target release year was 1990 and due to distractions, AAA was late.

AAA scales from low-cost 32-bit/64-bit DRAM to 64-bit VRAM.

3DO's ex-Amiga engineers have exploited Commodore's VRAM R&D experience.

Last edited by Hammer on 10-Sep-2024 at 07:36 AM.
Last edited by Hammer on 10-Sep-2024 at 07:32 AM.

_________________
Amiga 1200 (rev 1D1, KS 3.2, PiStorm32/RPi CM4/Emu68)
Amiga 500 (rev 6A, ECS, KS 3.2, PiStorm/RPi 4B/Emu68)
Ryzen 9 7900X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB

@cdimauro

Quote:

@cdimauro ROFL. We've recently talked about the SAME argument! Still NO, such FP DRAM changes NOTHING to the Blitter!

For 32x32 BOBs, AGA's Blitter is measurably faster on stock A1200.

Quote:

@cdimauro Are you sure? My argument was about FP DRAM which DOUBLED the effective memory bandwidth.

Meaningless. The important criteria with FP DRAM is the "read/write cycle" values which is an important factor for Lisa's memory timings.

Example from IC41C16257 FP DRAM
https://pdf.datasheetcatalog.com/datasheets2/77/778772_1.pdf
35 ns access has 60 ns read/write cycle.
50 ns access has 90 ns read/write cycle.
60 ns access has 110 ns read/write cycle.

A1200 FP DRAM's read/write cycle is in the 140 ns range which is effectively 7.1 Mhz.

Quote:

@cdimauro, Now, show me how the Blitter made use of it!

For 32x32 BOBs, AGA Blitter is measurably faster on stock A1200.


Quote:

@cdimauro, RI-ROFL: it's a 2D! 2D! 2D game! You do NOT need a super expensive DSP to make a game like that! The 14Mhz chipset which I've shown on my last article was way more than enough to make a perfect port of such games. WITHOUT any DSP, of course.

3DO's matrix math co-processor is for 3D, hence the 3D in 3DO.

3DO's Super Street Fighter II Turbo is just a #metoo port. PC-DOS has a good Super Street Fighter II Turbo port.

Quote:

@cdimauro, Not needed until Commodore time. Exactly like PCs have not needed them.

Reminders,
1. Motorola and Intel were caught blindsided by AMD's Am386-40 price against Motorola's 68030-25 and Intel's 386DX-25.

3DO's quick Doom port made it like 386DX-33 level results.

From 1992, Intel has 486 majority revenue.


2. 3DO's 3D accelerated Road Rash 1994 was ported to the PC in 1996 which recommended a Pentium class CPU.

3MB game console group's 3D hardware is just a poorman's Pentium class power.


3. Provide a 1993-1994 gaming PC that can run 3DO's 3D accelerated Road Rash 1994 for $699. 3DO was later priced at $399.


PS1-based Namco System 11 was released in Sep 1994, hence PS1's chipset production run was before this date.

Namco System 11's predecessor, Namco System 22 had Motorola 68020@ 24.576 MHz CPU, Evans & Sutherland TR3 GPU, and twoTMS32025 DSP (fast multiply-and-accumulate operation).

For geometry processing, the two TMS32025 @ 50Mhz DSP augmented the weak Motorola 68020 @ 24.5 Mhz CPU.

Namco System 22 was released in 1992 and its Ridge Racer was released in October 1993. Namco ported Ridge Racer for PS1 and Sony demonstrated it for 3rd party game developers in December 1993.

For US gaming systems in 1993, the gaming PC had Doom, IndyCar Racing, Ultima Underworld: The Stygian Abyss, Wing Commander II, and previews for 3D 1994 PC games in PC game magazines. With a flood of 3D texture-mapped PC game releases in 1994, the gaming PC platform would be able to hold its ground.

By the end of 1994, Intel has shipped 6 to 7 million Pentiums, hence creating a sizable install base and ready-to-face PS1's western 1995 release. Pentium Pro's 1995 release was important against workstation MIPS 4x00 CPUs. Pentium Pro's chipset also supported ECC memory. Intel's product releases are timely.

For 1993, the Amiga majority wasn't able to join the fast 386DX-33/Am386-40 and 3DO group.

Without Commodore's PC clones, Commodore's Amiga platform had no answer against incoming Japanese texture-mapped 3D games. There is no place for the Amiga.


-------------------------
PatG's Intel's Arrow Lake's excellent battery life is timely against Qualcomm Elite X.

Quote:

@cdimauro, But not production-ready.

It's good enough for Ridge Racer's PS1 dev kits production run.

Last edited by Hammer on 10-Sep-2024 at 09:11 AM.
Last edited by Hammer on 10-Sep-2024 at 08:54 AM.

_________________
Amiga 1200 (rev 1D1, KS 3.2, PiStorm32/RPi CM4/Emu68)
Amiga 500 (rev 6A, ECS, KS 3.2, PiStorm/RPi 4B/Emu68)
Ryzen 9 7900X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB

@Hammer

Quote:

Hammer wrote: @cdimauro Quote: @cdimauro Should I recall you what YOU have reported about the such engineers which were NOT able to take a decision on how to evolve the Amiga chipset? Yes, the go ahead came after two years... of such discussions. The forum's persistence enables non-real-time posted comments.

? I've just reported what you've already written here.
Quote:

Quote: @cdimauro Which was more than enough for the vast majority of PC graphic cards. The majority of 1990 to 1994 PCs with VGA wasn't limited by stock A1200's shared memory bandwdith.

Amiga 1200 wasn't limited by the shared memory bandwidth of the Chip RAM: there was the Fast RAM when there were different requirements (hint: the CPU had to do a lot of calculations).

Which means that it becomes exactly like a PC: it worked in its local, system memory and accessed to the devices (graphic cards, specifically) memory only when needed.
Quote:

Since 1992, Intel has a 486 revenue majority. AMD captured the 386DX market via Am386-40.

This is a completely different thing: the context here was about the video subsection of both Amigas and PCs, which is orthogonal to what processors was available / used at the time (Motorola was costly, but it had good products).
Quote:

The "22 percent of VGA 1991" Tseng Labs has extra tricks to speed up FP DRAM and it's not limited to A1200's 80 ns access/140 ns read-write cycle FP DRAM. ET4000 can exploit faster 70 ns to 50 ns access FP DRAM e.g.

Which of its versions used such memories on '92?
Quote:

ET4000W32I demands 50 ns access FPM.

It wasn't available on '92...
Quote:

For 41c16257 FP DRAM example https://pdf.datasheetcatalog.com/datasheets2/77/778772_1.pdf 35 ns access FP DRAM model has a 60 ns read/write cycle time which is 16.66 Mhz effective. 50 ns access FP DRAM model has a 90 ns read/write cycle time which is 11.11 Mhz effective.

OK, and which graphic cards used them on '92?
Quote:

Commodore has access to a discounted $20 extra for 8 MB RAM on top of 2 MB RAM's $50 baseline price.

How it's possible that it paid $50 for the the 2MB of DRAM and then it would have paid only $20 for 8MB?!?
Quote:

The "read/write cycle time" target is a major factor in Lisa's memory timing design.

Nevertheless, it squeezed all bandwidth of the FP DRAM, and that was the only important factor.
Quote:

The potential compromise is to go wider memory bus (e.g. 64-bit 50 ns FP DRAM) with cheap FP DRAM instead of AAA's costly 64-bit VRAM.

AAA supported all those four scenarios: from 1 x FP DRAM up to 2 x VRAM.
Quote:

Quote: @cdimauro Not needed: the FP mode allows to saturate the bus. It's still needed to hide latency.

Looking at how the chipset worked, this is not needed.

What was needed is taking advantage of the full bandwidth, which was the case.
Quote:

ET4000 has two 16-bit FP DRAM memory channels for Interleaved memory.

See above: not needed. A single 32-bit FP DRAM channel was perfect for how the chipset worked (and it worked in that way on the AGA).
Quote:

Quote: @cdimauro Whereas the VRAM was an option for the FUTURE high-end AAA systems. You've framed your argument as an outsider.

I'm just reporting the FACTs that also YOU have reported.
Quote:

AAA was canceled due to a lack of 3D FUTURE.

Care to prove this, precise, statement?
Quote:

AAA's R&D implementation started in June 1988.

That's wrong: the discussion was started, but NOT the implementation, according to what you've reported below.

I've highlighted the relevant parts for you.
Quote:

From Commodore - The Final Years, Quote: In June 1988, James Redfield began the detailed AAA architecture development, with a new engineer named Bob Schmid joining his efforts in August. They formed a plan to improve the video (Denise), sound (Paula), and blitter (Agnus) chips for the Amiga, which they called the AAA chipset. (skip) AAA Specs Before the engineers could begin work on the AAA chipset, the team had to clearly define the specifications. Not only did the chips have to match VGA standards, they had to have the ability to exceed them. It was hoped the chipset could be used in projects for 4-5 years after it was eventually released in 1990. (skip) The original Amiga team continued consulting as the specs developed. “Dale [Luck] was consulting on the software,� says Dave Haynie. “Jay [Miner] and a couple of other guys were doing chip consulting. (skip) In 1988, Linda was initially specced for 640 x 480, 800 x 600, and a whopping 1024 x 800 resolution (later reduced to 1024 by 768). These resolutions would keep up with the new SVGA standard. So far the plan sounded good. Like the original Amiga chipset, AAA was ostensibly designed to scale so it could be built into a variety of devices ranging from video game consoles, arcade machines, lowend computers, and high-end workstations. (skip) This new chipset would need to work with Video RAM, plus less-expensive 32/64 bit DRAM. (skip) AAA Progress James Redfield would now lead the development of the four AAA chips. If all went according to his schedule, the team would have working silicon by early 1990. Initially there were six other chip designers working on the chipset: Bob Schmid, Jeff Dean, Paul Anderson, Terry Hudson, Glenn Keller, and Victor Andrade. In the past, Commodore had required two engineers per chip; one designing and one simulating and testing the designs. With only seven engineers total, another key chip designer was soon added to the team in early 1989 for the most complicated chip of them all AAA's target release year was 1990 and due to distractions, AAA was late.

No, due to the incompetence: you've clearly reported on other comments that they under evaluated the complexity of the project and for this reason they were not able to meet the planned deadline.
Quote:

AAA scales from low-cost 32-bit/64-bit DRAM to 64-bit VRAM.

Exactly, and?
Quote:

3DO's ex-Amiga engineers have exploited Commodore's VRAM R&D experience.

Good for them...
Quote:

Hammer wrote: @cdimauro Quote: @cdimauro ROFL. We've recently talked about the SAME argument! Still NO, such FP DRAM changes NOTHING to the Blitter! For 32x32 BOBs, AGA's Blitter is measurably faster on stock A1200.

Again, the Blitter has NOT changed from the ECS: it was exactly the same!

You can say that it can take advantage of the more free (memory) slots which are available, and that's true, but with the MAXIMUM of 40% more bandwidth which is available, as I've already reported and provide full proof on the other thread.

Which is well BELOW the 60% that you've reported.

That's purely talking of the Blitter.
Quote:

Quote: @cdimauro Are you sure? My argument was about FP DRAM which DOUBLED the effective memory bandwidth. Meaningless.

No. "Strangely" you've cut part of my writing here, to distract from the original context. Here is it:

Are you sure? My argument was about FP DRAM which DOUBLED the effective memory bandwidth. Now, show me how the Blitter made use of it!

So, again: care to prove how the Blitter have took advantage of it?
Quote:

The important criteria with FP DRAM is the "read/write cycle" values which is an important factor for Lisa's memory timings. Example from IC41C16257 FP DRAM https://pdf.datasheetcatalog.com/datasheets2/77/778772_1.pdf 35 ns access has 60 ns read/write cycle. 50 ns access has 90 ns read/write cycle. 60 ns access has 110 ns read/write cycle. A1200 FP DRAM's read/write cycle is in the 140 ns range which is effectively 7.1 Mhz.

Sure, and? As I've already said, the important thing was to use the full memory bandwidth, and this was chieved.
Quote:

Quote: @cdimauro, Now, show me how the Blitter made use of it! For 32x32 BOBs, AGA Blitter is measurably faster on stock A1200.

See above: you completely missed the context. Or... you WANTED to miss it.

Again, should I recall that when YOU have written your previous comment YOU have reported the data for 64x64 BOBs, which were quite well UNDER the 60% increase that YOU've claimed before?

YOU have then edited your comment removing this specific part: WHY? Because it CONFUTED your rhetoric?

As you can see, I've no problem recalling every single part of the discussion... included the parts that you've edited and/or removed. Don't try to change the cards on the table with me: it doesn't work, and only proves your intellectual dishonesty.
Quote:

Quote: @cdimauro, RI-ROFL: it's a 2D! 2D! 2D game! You do NOT need a super expensive DSP to make a game like that! The 14Mhz chipset which I've shown on my last article was way more than enough to make a perfect port of such games. WITHOUT any DSP, of course. 3DO's matrix math co-processor is for 3D, hence the 3D in 3DO.

Irrelevant when talking about a 2D game (which YOU've made).
Quote:

3DO's Super Street Fighter II Turbo is just a #metoo port. PC-DOS has a good Super Street Fighter II Turbo port.

Right and guess what: even on the 3D Age people liked to play a lot to... 2D games.

Which wasn't your case, since you've clearly stated that you've preferred 3D games on such period of time.
Quote:

Quote: @cdimauro, Not needed until Commodore time. Exactly like PCs have not needed them. Reminders, 1. Motorola and Intel were caught blindsided by AMD's Am386-40 price against Motorola's 68030-25 and Intel's 386DX-25.

And what's the problem? Where they enough for 3D games or not? That's the only relevant thing here.
Quote:

3DO's quick Doom port made it like 386DX-33 level results.

Which is a very poor result, for console purely devoted to 3D and using a proper DSP for it.

Especially if you consider that the 80386 was a processor released on 1985: EIGHT years before!
Quote:

From 1992, Intel has 486 majority revenue.

OK, and? It's even better...
Quote:

2. 3DO's 3D accelerated Road Rash 1994 was ported to the PC in 1996 which recommended a Pentium class CPU.

Maybe it wasn't a good port, then.
Quote:

3MB game console group's 3D hardware is just a poorman's Pentium class power. 3. Provide a 1993-1994 gaming PC that can run 3DO's 3D accelerated Road Rash 1994 for $699. 3DO was later priced at $399.

Who cares? See also below, for a general statement about this context.
Quote:

PS1-based Namco System 11 was released in Sep 1994, hence PS1's chipset production run was before this date. Namco System 11's predecessor, Namco System 22 had Motorola 68020@ 24.576 MHz CPU, Evans & Sutherland TR3 GPU, and twoTMS32025 DSP (fast multiply-and-accumulate operation). For geometry processing, the two TMS32025 @ 50Mhz DSP augmented the weak Motorola 68020 @ 24.5 Mhz CPU. Namco System 22 was released in 1992 and its Ridge Racer was released in October 1993. Namco ported Ridge Racer for PS1 and Sony demonstrated it for 3rd party game developers in December 1993. For US gaming systems in 1993, the gaming PC had Doom, IndyCar Racing, Ultima Underworld: The Stygian Abyss, Wing Commander II, and previews for 3D 1994 PC games in PC game magazines. With a flood of 3D texture-mapped PC game releases in 1994, the gaming PC platform would be able to hold its ground. By the end of 1994, Intel has shipped 6 to 7 million Pentiums, hence creating a sizable install base and ready-to-face PS1's western 1995 release. Pentium Pro's 1995 release was important against workstation MIPS 4x00 CPUs. Pentium Pro's chipset also supported ECC memory. Intel's product releases are timely.

Sure, and can you see that PCs have delivered 3D games even with this big competition coming from consoles and arcade systems?

You've to focus on this point, to understand the context why your DSP rhetoric was and is a non-sense.
Quote:

For 1993, the Amiga majority wasn't able to join the fast 386DX-33/Am386-40 and 3DO group.

Why not? Accelerator boards were available, even bringing a 68040.
Quote:

Without Commodore's PC clones, Commodore's Amiga platform had no answer against incoming Japanese texture-mapped 3D games. There is no place for the Amiga.

The same should have applied to PCs, right? But PCs had 3D games, even using only the CPU.

Care to tell me why this wasn't possible for the Amiga as well?

And, to be more clear, WITHOUT the need of a DSP.
Quote:

------------------------- PatG's Intel's Arrow Lake's excellent battery life is timely against Qualcomm Elite X.

Lunar Lake (available in a couple of weeks) will be way better, and it'll crash AMD as well.

"Strangely" you continue to report only Qualcomm regarding those news, and not AMD, despite the comparisons included AMD as well. Why?
Quote:

Quote: @cdimauro, But not production-ready. It's good enough for Ridge Racer's PS1 dev kits production run.

Which is ok. I've absolutely no problem on that. In fact, I never had something against that.

@matthey

Which SAGA?

While Apollo team certainly has always its dramas and changes,
I believe we mean final implementation that went to V4 series, with current corres
(as it improved compatibility of timings through time)

Only release to public before V4 was GOLD3 Alpha for V2, that newer got update.
Update to it was seen on You Tube, but never went to public download.
And it seems it was way more refined since those days for V4.

_________________
Future Acube and MOS supporter, fi di good, nothing fi di unprofessionals. Learn it harder way!

vox Quote:

Which SAGA? While Apollo team certainly has always its dramas and changes, I believe we mean final implementation that went to V4 series, with current corres (as it improved compatibility of timings through time) Only release to public before V4 was GOLD3 Alpha for V2, that newer got update. Update to it was seen on You Tube, but never went to public download. And it seems it was way more refined since those days for V4.

SAGA works on the handful of Natami MX boards that were produced. It is mostly functional but it uses a soft blitter as FPGA blitter support was not complete. SAGA was converted from AHDL to VHDL and was maybe 90% functional as part of the Natami team. I believe Thomas Hirsch did the original AHDL coding and Gunnar converted it to VHDL but others may have been involved. Gunnar said he received permission to use SAGA from Thomas for the AC team. I suspect that Thomas asked for SAGA to be made open source as part of the agreement to obtain SAGA. I was one of the three original non-core members of the AC team and I am the person who originally suggested providing RTG/chipset functionality and more modern digital output (HDMI) with AC accelerators and stand alone hardware to improve the value. I can't verify that it was Thomas who asked for SAGA to be open sourced as I never saw any communications or talked to Thomas about it (Thomas joined the AC team after the time I was active). Jens wanted to make the N68050 he had written open source which was discussed in a private AC forum which has since been wiped by Gunnar. Gunnar was against open sourcing the N68050 core too.

SAGA may have had reduced functionality in smaller FPGAs before V4 hardware. Gunnar rewrote VHDL code and removed some support for the CPU core to reduce the logic size in early small FPGAs so it is logical to assume he would do the same for SAGA. Rewriting the code also allows to erase the origins of the original code and have unburdened claim of it. Of course such techniques are far from clean room re-implementations. Thomas and Jens tolerate such activity as they likely believe it is in the best interest of the Amiga and their friendship with Gunnar. Gunnar himself has stated that reviving the Amiga is one of the goals of the AC team yet the project has a completely different feel to the openness and developer community inclusion of the Natami project when Thomas led the team.

@matthey

It seems noble deed since Natami failed (I hoped for motherboard style SAGA and CPU and still do hope, would buy it even from AC) that both 050 CPU and SAGA chipset of that time got open sourced.

Only public thing was one time announcement of AC that they will open source SAGA (not CPU) and license 080, but none materialized, like GOLD3 core for V2.

How current SAGA evolved, only AC team members know and they seem to be subject of constant change. Even Majsta who gave Vampire name and single handedly tested and shipped all V2s was ditched and badworded ...

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@vox

Quote:

Which SAGA?

I was under the impression SAGA was sold in every standalone V4 and on the more beefed up line for A1200

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vox Quote:

It seems noble deed since Natami failed (I hoped for motherboard style SAGA and CPU and still do hope, would buy it even from AC) that both 050 CPU and SAGA chipset of that time got open sourced. Only public thing was one time announcement of AC that they will open source SAGA (not CPU) and license 080, but none materialized, like GOLD3 core for V2.

I believe Thomas and Jens are noble and good men. I believe Gunnar thinks he is noble and good but is not. I believe he is a narcissist who has trouble morally evaluating himself. A narcissist will never admit their lack of morality or failures as it would mean they are cured. They will be incensed at best and hostile at worst for even suggesting they are narcissists and what it implies.

vox Quote:

How current SAGA evolved, only AC team members know and they seem to be subject of constant change. Even Majsta who gave Vampire name and single handedly tested and shipped all V2s was ditched and badworded ...

The truth doesn't change and I have let the part I know be known. I chose Majsta because he was noble and convinced Gunnar to help him and work with him. At the time, Majsta was often frustrated with getting his Vampire accelerator to work properly but intent on persevering to lower the cost of Amiga hardware. Majsta may not even remember me as we rarely communicated directly. Ironically, I encouraged him in a forum post to raise the price of his accelerator to have enough profit for himself. I don't think he understood then but maybe he did later after he nearly worked himself to death for so little gain. He was often stubborn and bull headed but passionate and noble. I'm sorry things did not work out with Gunnar but I can understand why. I expect he learned a lot from the experience and I wish him well. I'm sorry we could not carry his Amiga inspiration forward.

@pixie

SAGA name was used for RTG drivers for V2. But improved chipset as well as enabling AGA titles on all Amigas (incl. A500,A600,A2000, A3000) is possible only with SAGA chipset implemented in V4 series. In V2 series it CPU plus RTG only.

@matthey

Yes Majstas goal was cheap and fast affordable accelerator, something V4 isn`t anymore.
instead of respecting him for generally making Vampire name and spreading V2 all over the world,
in the end Gunnar tried to charge him something like 100-200 euros per board for firmware, knowing he was barely profiting.

Gunnar might be engineering genius, but sucks in communication and humanity, managed to alienate
Jan and AmiKit XE and many nice and decent people, including its own team members. Too bad, as improved m68k and chipset seem like way forward. Now, its limited kingdom competing to much faster PiStorm, no longer speed king. V2 had chance to at least make 080 CPU in FPGA as new common standard, as well as at least RTG.

Last edited by vox on 13-Sep-2024 at 01:59 AM.

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