Complementing the previous article and with all the limitations imposed by Commodore management, the ECS chipset could have brought much more significant improvements by exploiting the advancement of technology.
English: https://www.appuntidigitali.it/20724/better-performance-with-amiga-ecs-but-still-without-new-chips/
Italian: https://www.appuntidigitali.it/20672/migliori-prestazioni-con-amiga-ecs-ma-ancora-senza-nuovi-chip/

@cdimauro

Agnus/Gary R&D was the memory controller from the mid-1980s. Ramsey was Commodore's 25 Mhz 32-bit memory controller R&D from the late 1980s.

DMA engine and raster graphics are built on memory controller infrastructure.

_________________
Ryzen 9 7900X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB
Amiga 1200 (Rev 1D1, KS 3.2, PiStorm32lite/RPi 4B 4GB/Emu68)
Amiga 500 (Rev 6A, KS 3.2, PiStorm/RPi 3a/Emu68)

@Hammer

Quote:

Hammer wrote: @cdimauro Agnus/Gary R&D was the memory controller from the mid-1980s. Ramsey was Commodore's 25 Mhz 32-bit memory controller R&D from the late 1980s. DMA engine and raster graphics are built on memory controller infrastructure.

You clearly know nothing how the Amiga worked, right?

Gary:
The Gary chip provides bus traffic control signals for the A500/A600/A2000 address and data bus. It was a consolidation of a large amount of descrete 74-series components and PALs on the A1000.


Ramsey:
Found only in the A3000 series and A4000T machines, the Ramsey is responsible for addressing RAM and producing DMA addressing, particularly with regards to the motherboard SCSI controller.

Agnus:
The Agnus is responsible for controlling around 25 system DMA channels, the generation of various system clocks in some Amiga's, and for addressing Chip RAM. Infact, Chip Memory is so called because it's addressable by the system's custom chips, unlike Fast Memory.

Do you know what the article was talking about? I don't think so, looking at the above chip descriptions.

@cdimauro
Your new article addresses the largest challenge to early Amiga chipset improvement which is chip memory bandwidth. Certainly by the late date of ECS release in 1990, doubling the CPU, chipset and memory clock speed should have been a given but I'm afraid that it violated the C= management "no new chips" order which likely meant no new parts and no cost increases. The cost would have been reasonable for double the performance but C= was still focused on the cheapest possible C64 replacement while ignoring value. C= could have potentially used 14MHz and VRAM to quadruple performance by that late date, even for the low end. The "no new chips" order didn't make sense unless it meant no cost increases as transistors in the chipset were likely already cheaper than other upgrades. ECS with just a chip mem bandwidth upgrade would have been an improvement but there was no excuse for not increasing color registers to at least 128 and adding 2 more bit plane pointers. Maybe management was afraid it resembled the Ranger chipset they had rejected. ECS should have been 14MHz and AGA should have used the AA+ spec at 28MHz. As I recall in the early to mid 1990s, there were 1 million transistor chipset chips clocked at 50MHz so even a single chip chipset was possible but C= was cheap.

For upgrade ability, I would look at reserving multiple bits in a register for a chipset clock multiplier rather than using a single bit. The post C= bankruptcy internal documents suggest someone at C= planned for 4 different clock multipliers. In reality, a single bit was enough for C= but that was the problem.

@matthey

Quote:

matthey wrote: @cdimauro Your new article addresses the largest challenge to early Amiga chipset improvement which is chip memory bandwidth. Certainly by the late date of ECS release in 1990, doubling the CPU, chipset and memory clock speed should have been a given but I'm afraid that it violated the C= management "no new chips" order which likely meant no new parts and no cost increases.

You've to put the things in perspective. Specifically, the key point is that the ECS chipset was first delivered with the Amiga 3000, which is NOT a cheap machine.

It was already shipped with a high-performance (for the Amiga time) CPU running at 16 or 25Mhz and with better memories. Both things were already more expensive if we take a look at the Amiga 500 and 2000.

So, having the ECS like I've suggested it would have changed absolutely nothing here, because my suggestions were perfectly in line with the "no new chips" diktat. It was cost effective. Hence, it perfectly matched the management expectations.

But once that the 3000 was out with the new chipset, then it would have changed as well the doom of the subsequent low-cost machines, which arrived some years later (I'm talking about the 500+ and the 600).

Think about the 3000 as the Trojan horse to introduce the new chipset.
Quote:

The cost would have been reasonable for double the performance but C= was still focused on the cheapest possible C64 replacement while ignoring value. C= could have potentially used 14MHz and VRAM to quadruple performance by that late date, even for the low end.

VRAM was still too expensive for a low-end machine: which low-end machines in the 1990-1992 time frame have used it?
Quote:

The "no new chips" order didn't make sense unless it meant no cost increases as transistors in the chipset were likely already cheaper than other upgrades.

That's exactly the point!
Quote:

ECS with just a chip mem bandwidth upgrade would have been an improvement but there was no excuse for not increasing color registers to at least 128 and adding 2 more bit plane pointers.

The 2 more bitplanes were easy to add, as explained on the first article.

However bringing the colour registers from 32 to 128 required A LOT of transistors. Hence: "no new chips".

An EHB mode extended to 128 and 256 colours would have mitigated the situation quite well (it's better than Acorn Archimedes, which had only a 16 entries CLUT).
Quote:

Maybe management was afraid it resembled the Ranger chipset they had rejected. ECS should have been 14MHz and AGA should have used the AA+ spec at 28MHz. As I recall in the early to mid 1990s, there were 1 million transistor chipset chips clocked at 50MHz so even a single chip chipset was possible but C= was cheap.

Without touching the Blitter? AA+ should have had a Blitter with double performance, but it looks like that it was still running at 7Mhz "for compatibility reasons" (which I've proved wrong on my article).
Quote:

For upgrade ability, I would look at reserving multiple bits in a register for a chipset clock multiplier rather than using a single bit. The post C= bankruptcy internal documents suggest someone at C= planned for 4 different clock multipliers. In reality, a single bit was enough for C= but that was the problem.

Well, we could have used FMODE for this. FMODE is the best candidate, because it changes anyway how the chipset works.

@cdimauro

Quote:

cdimauro wrote: @Hammer Quote: Hammer wrote: @cdimauro Agnus/Gary R&D was the memory controller from the mid-1980s. Ramsey was Commodore's 25 Mhz 32-bit memory controller R&D from the late 1980s. DMA engine and raster graphics are built on memory controller infrastructure. You clearly know nothing how the Amiga worked, right? Gary: The Gary chip provides bus traffic control signals for the A500/A600/A2000 address and data bus. It was a consolidation of a large amount of descrete 74-series components and PALs on the A1000. Ramsey: Found only in the A3000 series and A4000T machines, the Ramsey is responsible for addressing RAM and producing DMA addressing, particularly with regards to the motherboard SCSI controller. Agnus: The Agnus is responsible for controlling around 25 system DMA channels, the generation of various system clocks in some Amiga's, and for addressing Chip RAM. Infact, Chip Memory is so called because it's addressable by the system's custom chips, unlike Fast Memory. Do you know what the article was talking about? I don't think so, looking at the above chip descriptions.

Gary duplicates the functions of a large amount of discrete 74-series components and PALs on the A1000. This is a cost-reduction method via chip integration. This is like IBM's costly 8514 vs Tseng Labs lower-cost 8514 clone ET4000AX's chip integration. The only innovation is cost reduction. PC's SVGA groundwork is based on IBM 8514's 1987 innovation along with IBM's 1987-released VGA. The PC had its "Amiga 1000" moment in 1987 before the PC cloner's cost reduction.

For DMA functions with a new 32-bit memory controller, Ramsey is paired with SDMAC(Super DMAC). Commodore engineers design the necessary DMA engine and 25Mhz 32-bit memory controller infrastructure for the faster 68030 CPU. The missing component is the new graphics IP built on the new 32-bit infrastructure.

Commodore mastered a 25 Mhz 32-bit memory controller and matching DMA engine design.

The multimedia co-processor workaround for A3000+ AA is AT&T 3210DSP since it's not a "new chip". Commodore engineers are aware that 68040's compute power is not enough when PC's Pentium was released in 1993.

Quote:

Do you know what the article was talking about? I don't think so, looking at the above chip descriptions.

Look in the mirror, hypocrite when you missed the SDMAC pairing with Ramsey.

Last edited by Hammer on 06-Nov-2023 at 05:08 AM.
Last edited by Hammer on 06-Nov-2023 at 04:28 AM.
Last edited by Hammer on 06-Nov-2023 at 04:27 AM.

_________________
Ryzen 9 7900X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB
Amiga 1200 (Rev 1D1, KS 3.2, PiStorm32lite/RPi 4B 4GB/Emu68)
Amiga 500 (Rev 6A, KS 3.2, PiStorm/RPi 3a/Emu68)

@matthey

Quote:

matthey wrote: @cdimauro Your new article addresses the largest challenge to early Amiga chipset improvement which is chip memory bandwidth. Certainly by the late date of ECS release in 1990, doubling the CPU, chipset and memory clock speed should have been a given but I'm afraid that it violated the C= management "no new chips" order which likely meant no new parts and no cost increases. The cost would have been reasonable for double the performance but C= was still focused on the cheapest possible C64 replacement while ignoring value. C= could have potentially used 14MHz and VRAM to quadruple performance by that late date, even for the low end. The "no new chips" order didn't make sense unless it meant no cost increases as transistors in the chipset were likely already cheaper than other upgrades. ECS with just a chip mem bandwidth upgrade would have been an improvement but there was no excuse for not increasing color registers to at least 128 and adding 2 more bit plane pointers. Maybe management was afraid it resembled the Ranger chipset they had rejected. ECS should have been 14MHz and AGA should have used the AA+ spec at 28MHz. As I recall in the early to mid 1990s, there were 1 million transistor chipset chips clocked at 50MHz so even a single chip chipset was possible but C= was cheap. For upgrade ability, I would look at reserving multiple bits in a register for a chipset clock multiplier rather than using a single bit. The post C= bankruptcy internal documents suggest someone at C= planned for 4 different clock multipliers. In reality, a single bit was enough for C= but that was the problem.

FYI, Amiga 3000 has an extra 60 ns frame buffer video memory (three 256K×4, OKI MSM514221) for Amber flicker fixer which is recycled from the Amiga 2000's A2320 flicker fixer expansion card.

Amber's 60 ns video memory has no problems with more than four colors 31 kHz requirements.

Amiga 3000's Amber flicker fixer is a workaround to deliver non-flicker 640x512 resolution with 16 colors and a 4096 (12-bit) color palette. It was useful when I had Amiga's low-cost CAD software, TurboPrint, and a PC SVGA monitor for my technical drawing school subjects.

My "What IF" Amiga 1200's 640x480p productivity mode with 16-to-256 colors would do the job, but color depth needs to be restricted due to performance issues.

My SVGA ET4000AX+386DX-33/387-33 FPU PC clone had a lower cost and performance advantage during the 1992-1993 time period.

Amiga 3000 has components that make it expensive e.g. Super Buster I/O chip, daughter card with 16-bit ISA/32-bit Z3/Video slots, hard metal internal/external platform, Amber flicker fixer with video memory, and 'etc'. My local PC shop has commented that the Amiga 3000's material construction is overkill during its 4MB ZIP RAM upgrade. BMW's mindset wouldn't win the PC's race to the bottom. It's too bad, that the Amiga 3000 doesn't have better graphics for its quality construction.

My Dad had effectively two 386DX class machines for our family i.e. PC 386DX-33 clone and Amiga 3000 (68030 @ 25Mhz).

Reference
https://www.datasheetarchive.com/datasheet?id=86c0417244dff8ab272b6ffd4e84c593face33&type=O&term=msm514221-6

Last edited by Hammer on 06-Nov-2023 at 05:25 AM.
Last edited by Hammer on 06-Nov-2023 at 05:21 AM.
Last edited by Hammer on 06-Nov-2023 at 05:00 AM.
Last edited by Hammer on 06-Nov-2023 at 04:55 AM.

_________________
Ryzen 9 7900X, DDR5-6000 64 GB RAM, GeForce RTX 4080 16 GB
Amiga 1200 (Rev 1D1, KS 3.2, PiStorm32lite/RPi 4B 4GB/Emu68)
Amiga 500 (Rev 6A, KS 3.2, PiStorm/RPi 3a/Emu68)

@cdimauro

So you are proposing completely new chips for a better ECS "without new chips".

Obvious that Increasing the databus means a redesign. Upping the frequency sounds simple just try a 32MHz crystal in an A500 and see how far you get.

Sure the floppy will go out of whack but that isn't really needed for such a test and once you find a screen that will take a 17kHz signal you should be good.
You won't.

The chips were designed to max out the process MOS used, higher frequency would break the timing. Adding some extra transistor to a function block would have required extra space moving surrounding blocks further apart breaking timing again.

Moving to a different (smaller) process would have solved those problems but that would have been "new chips" in any meaning those 2 words might have.

So I do think "no new chips" was never said it in that way, what might have been said is "no outsourced chips" and "no upgrade to the MOS production line".

Sounds incompetent maybe even evil but is not that much different then Intel being stuck at 14nm for centuries and finally caving in into have their GPUs done externally (that must have hurt).

_________________
- We don't need good ideas, we haven't run out on bad ones yet
- blame Canada

@Kronos

Just like today, so too back then, within a single year it was possible to use the same board size and complexity, same or lesser number of components, at same or lesser cost of components, to achieve the same outcome at a lower cost or greater outcome at the same cost.

For example, SONY could literally a year after launch optimize a PS5 to use fewer components at lower prices, thus optimizing its profit margins. The reason they rarely do so in yearly cycles is that there are many other costs associated with frequent change that would eat up the benefits, plus they often strike multi-year component deals at specific prices which better align with the economies of scale for hardware cost optimizations. A sort of punctuated equilibrium of hardware evolution.

And it’s not just gaming consoles. Most car manufacturing is subject to the same commercial dynamics.

Which is why I have no problem believing that in 1985 it would’ve been possible to engineer an Amiga 1000 board which didn’t increase in complexity, component numbers or overall cost, yet produce higher (ECS-like) performance outcomes.

The main problem was that Commodore didn’t see itself as a high-performance computing company, so their myopic focus was on reducing cost, even when it was at the expense of market-expected performance.

To use an analogy, C= bought a jet engine. And instead of pivoting into a company that makes jets, they were focused on shrinking the jet engine to fit into a moped, for a market which had moved on to mostly buying cars.

_________________
All the way, with 68k

@agami

Quote:

agami wrote: Which is why I have no problem believing that in 1985 it would’ve been possible to engineer an Amiga 1000 board which didn’t increase in complexity, component numbers or overall cost, yet produce higher (ECS-like) performance outcomes.

Well they kinda did that in the A500 which was in a few key areas better then the A1000.
Most notably the ability to not only have 512k onboard but also an easy/cheap way to add another 512k.

But just like Intel was stuck on 14nm for 5 years, C= was stuck on MOS 5 μm and could only do small gains the hard way.

Anything more would have required outsourcing the new chips (which would have increased production costs and most skyrocketed those for development) are updating MOS equipment which they didn't have the resources and would only be viable if they could go back to providing the rest of the industry (as they did for a big chunk of 8Bit tech).

So yeah, AGA/Ranger/whatever is super easy for a 2023 armchair engineer but for those who had to work within the restraints of that time it was a multi year progress (which then got delayed further for non engineering reasons).

_________________
- We don't need good ideas, we haven't run out on bad ones yet
- blame Canada

@Kronos

Quote:

Kronos wrote: @agami But just like Intel was stuck on 14nm for 5 years, C= was stuck on MOS 5 μm and could only do small gains the hard way. Anything more would have required outsourcing the new chips (which would have increased production costs and most skyrocketed those for development) are updating MOS equipment which they didn't have the resources and would only be viable if they could go back to providing the rest of the industry (as they did for a big chunk of 8Bit tech).

If chip-making was no longer their forte, and the facility was no longer an asset, then like AMD with Global Foundries, they should’ve sold it off and then they’d have the money to outsource to those who are actually good at it.

Commodore forgot what business they’re in.
It happens to most companies, and for many of them the consequences are dire.
Existence is always in the balance of existential questions.

_________________
All the way, with 68k

@agami

MOS was a money printing machine right until C= died.

6502 computers both C= and non C= outsold the Amiga for most of the Amiga's lifetime.

Investing several millions to update MOS would have been a gamble.

Going external and spending millions in development (compared to being able to do in fully in house) all for getting a bit more performance on a computer that had already more then it's target audience needed.


-> Armchair engineering/management

_________________
- We don't need good ideas, we haven't run out on bad ones yet
- blame Canada

@Hammer

Quote:

Hammer wrote: @cdimauro Quote: cdimauro wrote: @Hammer You clearly know nothing how the Amiga worked, right? Gary: The Gary chip provides bus traffic control signals for the A500/A600/A2000 address and data bus. It was a consolidation of a large amount of descrete 74-series components and PALs on the A1000. Ramsey: Found only in the A3000 series and A4000T machines, the Ramsey is responsible for addressing RAM and producing DMA addressing, particularly with regards to the motherboard SCSI controller. Agnus: The Agnus is responsible for controlling around 25 system DMA channels, the generation of various system clocks in some Amiga's, and for addressing Chip RAM. Infact, Chip Memory is so called because it's addressable by the system's custom chips, unlike Fast Memory. Do you know what the article was talking about? I don't think so, looking at the above chip descriptions. Gary duplicates the functions of a large amount of discrete 74-series components and PALs on the A1000. This is a cost-reduction method via chip integration. This is like IBM's costly 8514 vs Tseng Labs lower-cost 8514 clone ET4000AX's chip integration. The only innovation is cost reduction. PC's SVGA groundwork is based on IBM 8514's 1987 innovation along with IBM's 1987-released VGA. The PC had its "Amiga 1000" moment in 1987 before the PC cloner's cost reduction. For DMA functions with a new 32-bit memory controller, Ramsey is paired with SDMAC(Super DMAC). Commodore engineers design the necessary DMA engine and 25Mhz 32-bit memory controller infrastructure for the faster 68030 CPU. The missing component is the new graphics IP built on the new 32-bit infrastructure. Commodore mastered a 25 Mhz 32-bit memory controller and matching DMA engine design. The multimedia co-processor workaround for A3000+ AA is AT&T 3210DSP since it's not a "new chip". Commodore engineers are aware that 68040's compute power is not enough when PC's Pentium was released in 1993. Quote: Do you know what the article was talking about? I don't think so, looking at the above chip descriptions. Look in the mirror, hypocrite when you missed the SDMAC pairing with Ramsey.

Hey, PARROT: you don't need to give other proofs that you've no clue about how the Amiga hardware worked, by just grabbing some words around internet that might recall the topic.

What's evident is that you completely lack the knowledge about what the article was talking about and then, as usual, you start randomly repeating words (Gary, Ramsey, SVGA, 8514, ...) and adding things (DSP, 68040, Pentium) which have absolutely nothing in common with the real argument.

It's a recurring pattern with you: the man which pretends to show knowledge googling around for keywords and reporting them on wall-of-texts.

Even on EAB you're constantly showing how much ignorant you are and people are slapping you twice at the time until they become odd.


@Kronos

Quote:

Kronos wrote: @cdimauro So you are proposing completely new chips for a better ECS "without new chips". Obvious that Increasing the databus means a redesign. Upping the frequency sounds simple just try a 32MHz crystal in an A500 and see how far you get. Sure the floppy will go out of whack but that isn't really needed for such a test and once you find a screen that will take a 17kHz signal you should be good. You won't. The chips were designed to max out the process MOS used, higher frequency would break the timing. Adding some extra transistor to a function block would have required extra space moving surrounding blocks further apart breaking timing again. Moving to a different (smaller) process would have solved those problems but that would have been "new chips" in any meaning those 2 words might have. So I do think "no new chips" was never said it in that way, what might have been said is "no outsourced chips" and "no upgrade to the MOS production line". Sounds incompetent maybe even evil but is not that much different then Intel being stuck at 14nm for centuries and finally caving in into have their GPUs done externally (that must have hurt).

Those are fair points.

Let me add something:
- the changes which I've proposed require only a bunch of transistors;
- Commodore has used better fabrication process (e.g. 1.5u for producing Alice);
- new fabrication processes weren't expensive to introduce (not like today) and producing chips with them was a great benefit for the company;
- ECS Denise already had to use a new, higher (14Mhz) clock to produce the Super-HiRes resolution (70ns).

And of course: it's not about raising the clock up and everything is working. I've already reported it on my article that some changes where required (giving the example of the floppy controller).

@cdimauro

Great points, and yes the 3000D was expensive.

To your point, the 3000T in fact was the most expensive Amiga (and the best imho) ever sold.

To put in in perspective, they offer many features and chips over the last gen Amiga that it replaced. Yes, ECS was a stepping stone, but for me I look at everything else that the 3k brought to the party and I was happy.

@cdimauro

Wether you had 1 transistor or 10000 you still have to "open" the design a design that was already working by miracle.

Thats what they did anyways and managed to squeeze out the little gains we got.

ECS Denise did indeed introduce SuperHighRes while keeping the same bandwidth (and thereby maxing out at 2 bitplanes). Doesn't mean anything else in the chips could have been made better/faster easily.
Alice did come much later at which point the may have finetuned the machines or even replaced some.

A new process may have been cheaper (don't forget for inflation when going back that far) but it would have for a much smaller market.

Couldn't find an exact number but I'd wager even in their best year the sold less then 5 millions units (8Bit,Amiga,PC) which would be a really bad week for Apple or any chip supplier today.

Last edited by Kronos on 06-Nov-2023 at 05:07 PM.

_________________
- We don't need good ideas, we haven't run out on bad ones yet
- blame Canada

@Kronos

Quote:

Kronos wrote: @agami MOS was a money printing machine right until C= died.

Which is code for: They milked it for all it was worth until it was worth less than nothing.
That’s how you might treat something you find on the street. Easy come and easy go.
That’s not how you treat an asset.

_________________
All the way, with 68k

cdimauro Quote:

VRAM was still too expensive for a low-end machine: which low-end machines in the 1990-1992 time frame have used it?

The 2MiB of chip memory DRAM cost $50 according to the Commodore Post Bankruptcy document. VRAM only cost 20% more according to some sources, one mentions in 1990.

https://en.wikipedia.org/wiki/Amiga_Ranger_Chipset#Overview Quote:

In a few years, VRAM costs dropped to be only 20% more than DRAM, so Commodore planned to use VRAM in the AAA chipset, the next-gen Amiga chipset left in an unfinished state when the company went into voluntary liquidation in 1994.

I don't think $60 for VRAM instead of $50 for DRAM would have been a problem for even low end Amigas if the chip memory bandwidth doubled and contention between the CPU and chipset was significantly reduced. It is possible that DRAM was the better option if VRAM could not double chip memory performance over what DRAM could provide.

cdimauro Quote:

The 2 more bitplanes were easy to add, as explained on the first article. However bringing the colour registers from 32 to 128 required A LOT of transistors. Hence: "no new chips". An EHB mode extended to 128 and 256 colours would have mitigated the situation quite well (it's better than Acorn Archimedes, which had only a 16 entries CLUT).

The transistor count of more color registers was a problem in 1984-1985 but I seriously doubt an issue by 1990. EHB with 3/4, 1/2 and 1/4 brightness colors is not a bad option though. It's good for shading. Perhaps not as good for dual playfield mode though? Also, it would have been nice if sprites could use a color palette offset so more color registers would be more useful like SAGA added.

cdimauro Quote:

Without touching the Blitter? AA+ should have had a Blitter with double performance, but it looks like that it was still running at 7Mhz "for compatibility reasons" (which I've proved wrong on my article).

It sounds possible that the blitter clock speed would be doubled to 14MHz.

https://en.wikipedia.org/wiki/AA+_Chipset#Blitter Quote:

A 2x blitter performance over AGA/ECS one was promised, however Commodore never mentioned that AA+ had 32-bit blitter like AAA, so AA+ blitter would stay 16-bit to keep the cost down. A 2X performance might be gained by increasing blitter clock cycle from 7 MHz to 14 MHz, but by doing this AA+ will lose compatibility with a large base of hardware banging software which depend on synchronizing with blitter cycles like most demos and games of that era.

AA+ may have been planned to run at up to 28MHz according to the Commodore Post Bankruptcy docs but I suspect this chipset was not developed as far as the Ranger chipset.

Kronos Quote:

But just like Intel was stuck on 14nm for 5 years, C= was stuck on MOS 5 μm and could only do small gains the hard way. Anything more would have required outsourcing the new chips (which would have increased production costs and most skyrocketed those for development) are updating MOS equipment which they didn't have the resources and would only be viable if they could go back to providing the rest of the industry (as they did for a big chunk of 8Bit tech).

I heard MOS/CSG could fab down to 1000nm while OCS used a 5000nm process (Dave Haynie remark?). I don't know if that is CMOS or NMOS and they could have had reduced chip yields with older equipment at the smaller nodes. CMOS gives a huge reduction in power use but it uses more transistors so C= may have been cheap. The Amiga chipset should have been converted to CMOS, integrated down to 1-2 chips and used a small node by the early 1990s even though there would have been an up front cost and regardless of whether MOS/CSG could fab the chips. Development would have been easier, it could have been clocked up for better performance and there may have been a production cost savings from smaller cheaper boards and smaller power supplies.

Kronos Quote:

MOS was a money printing machine right until C= died. 6502 computers both C= and non C= outsold the Amiga for most of the Amiga's lifetime. Investing several millions to update MOS would have been a gamble. Going external and spending millions in development (compared to being able to do in fully in house) all for getting a bit more performance on a computer that had already more then it's target audience needed.

MOS/CSG was somewhat a victim of its own success. Jack likely bought MOS as much for the KIM-1 computer as the 6502 CPU.

http://retro.hansotten.nl/6502-sbc/kim-1-manuals-and-software/
https://www.commodore.ca/commodore-products/productscsg-mos-commodore-kim-1-history-pictures/

MOS/CSG was too focused producing the 6502, KIM-1 and later Pet to meet product demand and the fab was less of a priority. Bill Mensch, who left MOS and founded Western Design in 1978, did more 6502 development than MOS/CSG and some people give him credit for pioneering the a la carte fabless semiconductor development, licensing and royalty system like ARM uses today.

https://www.westerndesigncenter.com/wdc/cores.php

MOS/CSG disappeared but Western Design is still licensing 6502 family IP.

https://westerndesigncenter.com/ Quote:

Annual volumes in the hundreds (100's) of millions of units keep adding in a significant way to the estimated shipped volumes of five (5) to ten (10) billion units.

It's too bad the 68k family of CPU cores can't be licensed so easily. As popular and ahead of its time as the 1979 68000 was, Motorola focused more on the production than the development also and the 68020 didn't come out until 1984. The Amiga was also ahead of its time and production was the C= focus instead of hardware development. Businesses with long product development cycles were punished after Moore's Law kicked in hard.

Last edited by matthey on 06-Nov-2023 at 08:50 PM.

@Matt3k

Quote:

Matt3k wrote: @cdimauro Great points, and yes the 3000D was expensive. To your point, the 3000T in fact was the most expensive Amiga (and the best imho) ever sold.

Exactly. With new chips. Even completely new chips, like Amber and A LOT of memory to make it work...
Quote:

To put in in perspective, they offer many features and chips over the last gen Amiga that it replaced.

The problem is that most of those were totally useless. The chipset needs much more to remain at least a bit more competitive.
Quote:

Yes, ECS was a stepping stone, but for me I look at everything else that the 3k brought to the party and I was happy.

Well, the Amiga 3000 itself was a beautiful machine: I wanted to have one. However it was so much expensive...


@Kronos

Quote:

Kronos wrote: @cdimauro Wether you had 1 transistor or 10000 you still have to "open" the design a design that was already working by miracle. Thats what they did anyways and managed to squeeze out the little gains we got.

Nevertheless, they did with by adding several new transistors on top of the OCS baseline...
Quote:

ECS Denise did indeed introduce SuperHighRes while keeping the same bandwidth (and thereby maxing out at 2 bitplanes). Doesn't mean anything else in the chips could have been made better/faster easily.

It doesn't mean the contrary as well: maybe it could have been possibile but the engineers not even tried it.
Quote:

Alice did come much later at which point the may have finetuned the machines or even replaced some. A new process may have been cheaper (don't forget for inflation when going back that far) but it would have for a much smaller market.

On this I like that Matthew reported on his post.
Quote:

Couldn't find an exact number but I'd wager even in their best year the sold less then 5 millions units (8Bit,Amiga,PC) which would be a really bad week for Apple or any chip supplier today.

That was good enough for the company to survive.


@matthey

Quote:

matthey wrote: cdimauro Quote: VRAM was still too expensive for a low-end machine: which low-end machines in the 1990-1992 time frame have used it? The 2MiB of chip memory DRAM cost $50 according to the Commodore Post Bankruptcy document. VRAM only cost 20% more according to some sources, one mentions in 1990. https://en.wikipedia.org/wiki/Amiga_Ranger_Chipset#Overview Quote: In a few years, VRAM costs dropped to be only 20% more than DRAM, so Commodore planned to use VRAM in the AAA chipset, the next-gen Amiga chipset left in an unfinished state when the company went into voluntary liquidation in 1994. I don't think $60 for VRAM instead of $50 for DRAM would have been a problem for even low end Amigas if the chip memory bandwidth doubled and contention between the CPU and chipset was significantly reduced. It is possible that DRAM was the better option if VRAM could not double chip memory performance over what DRAM could provide.

OK, it isn't that much.

However I assume that the chipset should have had important redesign to implement the VRAM support.
Quote:

cdimauro Quote: The 2 more bitplanes were easy to add, as explained on the first article. However bringing the colour registers from 32 to 128 required A LOT of transistors. Hence: "no new chips". An EHB mode extended to 128 and 256 colours would have mitigated the situation quite well (it's better than Acorn Archimedes, which had only a 16 entries CLUT). The transistor count of more color registers was a problem in 1984-1985 but I seriously doubt an issue by 1990.

I agree, but adding so many registers would have mean that the chips become fatter. At least Denise.

But if you wanted a clean design instead of the horrible AGA hack of bank switching, you needed to increase the number of address lines. Which influences all chips.
Quote:

EHB with 3/4, 1/2 and 1/4 brightness colors is not a bad option though. It's good for shading. Perhaps not as good for dual playfield mode though?

Sorry, it's not clear to me: what about the DP mode?
Quote:

Also, it would have been nice if sprites could use a color palette offset so more color registers would be more useful like SAGA added.

It wasn't useful without extending the CLUT to 128 or 256 entries.
Quote:

cdimauro Quote: Without touching the Blitter? AA+ should have had a Blitter with double performance, but it looks like that it was still running at 7Mhz "for compatibility reasons" (which I've proved wrong on my article). It sounds possible that the blitter clock speed would be doubled to 14MHz. https://en.wikipedia.org/wiki/AA+_Chipset#Blitter Quote: A 2x blitter performance over AGA/ECS one was promised, however Commodore never mentioned that AA+ had 32-bit blitter like AAA, so AA+ blitter would stay 16-bit to keep the cost down. A 2X performance might be gained by increasing blitter clock cycle from 7 MHz to 14 MHz, but by doing this AA+ will lose compatibility with a large base of hardware banging software which depend on synchronizing with blitter cycles like most demos and games of that era. AA+ may have been planned to run at up to 28MHz according to the Commodore Post Bankruptcy docs but I suspect this chipset was not developed as far as the Ranger chipset.

28Mhz is quadruple the bandwidth in a totally backward-compatible mode. That's A LOT! IF that was the plan...
Quote:

Kronos Quote: But just like Intel was stuck on 14nm for 5 years, C= was stuck on MOS 5 μm and could only do small gains the hard way. Anything more would have required outsourcing the new chips (which would have increased production costs and most skyrocketed those for development) are updating MOS equipment which they didn't have the resources and would only be viable if they could go back to providing the rest of the industry (as they did for a big chunk of 8Bit tech). I heard MOS/CSG could fab down to 1000nm while OCS used a 5000nm process (Dave Haynie remark?). I don't know if that is CMOS or NMOS and they could have had reduced chip yields with older equipment at the smaller nodes. CMOS gives a huge reduction in power use but it uses more transistors so C= may have been cheap. The Amiga chipset should have been converted to CMOS, integrated down to 1-2 chips and used a small node by the early 1990s even though there would have been an up front cost and regardless of whether MOS/CSG could fab the chips. Development would have been easier, it could have been clocked up for better performance and there may have been a production cost savings from smaller cheaper boards and smaller power supplies. Kronos Quote: MOS was a money printing machine right until C= died. 6502 computers both C= and non C= outsold the Amiga for most of the Amiga's lifetime. Investing several millions to update MOS would have been a gamble. Going external and spending millions in development (compared to being able to do in fully in house) all for getting a bit more performance on a computer that had already more then it's target audience needed. MOS/CSG was somewhat a victim of its own success. Jack likely bought MOS as much for the KIM-1 computer as the 6502 CPU. http://retro.hansotten.nl/6502-sbc/kim-1-manuals-and-software/ https://www.commodore.ca/commodore-products/productscsg-mos-commodore-kim-1-history-pictures/ MOS/CSG was too focused producing the 6502, KIM-1 and later Pet to meet product demand and the fab was less of a priority. Bill Mensch, who left MOS and founded Western Design in 1978, did more 6502 development than MOS/CSG and some people give him credit for pioneering the a la carte fabless semiconductor development, licensing and royalty system like ARM uses today. https://www.westerndesigncenter.com/wdc/cores.php MOS/CSG disappeared but Western Design is still licensing 6502 family IP. https://westerndesigncenter.com/ Quote: Annual volumes in the hundreds (100's) of millions of units keep adding in a significant way to the estimated shipped volumes of five (5) to ten (10) billion units.

Very interesting, thanks. Then I think that something could have been possible even using MOS chips.
Quote:

It's too bad the 68k family of CPU cores can't be licensed so easily.

But it should be still possible, right?
Quote:

As popular and ahead of its time as the 1979 68000 was, Motorola focused more on the production than the development also and the 68020 didn't come out until 1984. The Amiga was also ahead of its time and production was the C= focus instead of hardware development. Businesses with long product development cycles were punished after Moore's Law kicked in hard.

*

cdimauro Quote:

OK, it isn't that much. However I assume that the chipset should have had important redesign to implement the VRAM support.

A redesign for VRAM like the Ranger chipset and AAA? AAA could use VRAM or DRAM so it may have been possible to backport this tech to the later AGA?

https://en.wikipedia.org/wiki/Advanced_Amiga_Architecture_chipset#Design_goals Quote:

VRAM Chip Memory systems with optional 32/64 bit DRAM chip memory (for lower cost systems).

AAA supporting VRAM and DRAM implies that VRAM offered additional performance over the best possible DRAM performance. Supporting both memory types likely used a few more transistors but it shouldn't have been a problem in the early 1990s as C= was building prototype chips of AAA with it. How much more competitive would AGA with VRAM and x8 OCS chip mem bandwidth have been especially for the high end Amiga market? How much more competitive would AA+ have been with x16 chip mem bandwidth from VRAM and a 28MHz clock speed? Should the Ranger chipset have received a can you make it so it can use VRAM or DRAM and lets see where VRAM prices go instead of a never and bury it response from C= upper management?

cdimauro Quote:

Sorry, it's not clear to me: what about the DP mode?

It's just that it would be better for multiple playfields to have their own color registers. This would have made porting arcade, X68000 and NeoGeo games to the Amiga easier and more faithful. It wouldn't have taken many transistors to make the Amiga the arcade in the home for the 1990s like it was in the late 1980s. AGA was a moderate improvement but still lagged the x68000 and NeoGeo which often had full arcade quality game ports as well as arcade quality games made for them.

cdimauro Quote:

It wasn't useful without extending the CLUT to 128 or 256 entries.

Right. I was just pointing out that more color registers are useful for more than bitmaps. Transistors being too expensive for ECS in 1990 with only 32 color registers while AGA in 1992 expanded to 256 color registers because transistors were all of a sudden cheaper defies logic.

cdimauro Quote:

28Mhz is quadruple the bandwidth in a totally backward-compatible mode. That's A LOT! IF that was the plan... [quote] And then possibly add VRAM as suggested above for 16x chip mem bandwidth and I believe user's perspective of slow AGA would have changed. AA+ could have pushed the 16 bit chunky although users likely would have been asking for more chip mem and 24/32 bit chunky modes. Chunky 16 bit was better for games for a long time as it was faster though. cdimauro [quote] But it should be still possible, right?

It should be possible to license 68k cores from NXP as long as the licenses don't conflict with licenses for 3rd party EOL manufacturers and distributors like Rochester Electronics. Speaking of Rochester Electronics, they are now out of the 68060 while they have 68020-68040 CPUs. The following link is for their 68040 inventory.

https://www.rocelec.com/search?q=MC68040

Customers paid hundreds USD per CPU and bought out all of their 68060 inventory though. I believe Rochester has the capability to manufacture more but I don't know if it would be worthwhile. It is not easy as the wafer size is no longer available but they have specialized equipment that can duplicate chips in lower volumes and they may have old wafers that need processing. There are other licensed resellers of EOL Motorola/Freescale/NXP chips so the license is likely not exclusive. Rochester Electronics is the largest though.

Only 35% of the 68060 die area used synthesized logic while the rest was customized logic. The customized logic could have been in-house or licensed. Licensed logic could be a problem but maybe that is less likely considering the age. The similar ColdFire v5 uses 100% synthesized logic so it may be helpful to license that core at the same time. The 100% synthesized logic makes it easier to layout the logic and change fab processes but custom logic blocks are more optimized. Custom blocks likely wouldn't be needed to meet 68060 timing requirements with a semi-modern fab process. The HDL and development tools are likely old and it would be good to get an architect that has experience with them and could modernize the development. I have more questions than answers myself. I would want to have a few million USD in financing before asking questions. The license fees for ARM cores are usually $1-$10 million USD to put that in perspective. I would hope a core like the 68060 which is very old, generates negligible revenue for NXP and would need significant development, could be licensed for a reasonable cost in comparison to an ARM license for a core.

@matthey

Quote:

matthey wrote: cdimauro Quote: OK, it isn't that much. However I assume that the chipset should have had important redesign to implement the VRAM support. A redesign for VRAM like the Ranger chipset and AAA? AAA could use VRAM or DRAM so it may have been possible to backport this tech to the later AGA? https://en.wikipedia.org/wiki/Advanced_Amiga_Architecture_chipset#Design_goals Quote: VRAM Chip Memory systems with optional 32/64 bit DRAM chip memory (for lower cost systems). AAA supporting VRAM and DRAM implies that VRAM offered additional performance over the best possible DRAM performance. Supporting both memory types likely used a few more transistors but it shouldn't have been a problem in the early 1990s as C= was building prototype chips of AAA with it.

Yes, this is the context: 1990. And to be more precise, it's about what changes to the ECS chipset were needed to achieve that WITHOUT violating the "no new chips" directive.

Do you think that adding such VRAM support was still possibile (e.g.: not many transistors required. Remaining on the ECS budget)?

From what you've written it should have been possible. I'm not an expert on that, but to me it smells that you need much more transistors to change the arbitration logic and adding several buffers; at least.
Quote:

How much more competitive would AGA with VRAM and x8 OCS chip mem bandwidth have been especially for the high end Amiga market? How much more competitive would AA+ have been with x16 chip mem bandwidth from VRAM and a 28MHz clock speed?

Yes, AGA was already on a better position because there was the OK from management to create fatter chips.

However they (engineers) failed again because they added the bare minimum without introducing the most important things (e.g.: a Blitter with higher clock).
Quote:

Should the Ranger chipset have received a can you make it so it can use VRAM or DRAM and lets see where VRAM prices go instead of a never and bury it response from C= upper management?

Understood, but maybe '87/88 was too early for the VRAM and prices were too high.
Quote:

cdimauro Quote: Sorry, it's not clear to me: what about the DP mode? It's just that it would be better for multiple playfields to have their own color registers.

With my suggestion ECS could have had 16 + 16 colours playfields and each one with its own set of CLUT entries.

Nothing else should have been possible with a 32 entries CLUT.
Quote:

This would have made porting arcade, X68000 and NeoGeo games to the Amiga easier and more faithful. It wouldn't have taken many transistors to make the Amiga the arcade in the home for the 1990s like it was in the late 1980s.

Unfortunately it would have taken: CLUT entries require too many transistors.
Quote:

AGA was a moderate improvement but still lagged the x68000 and NeoGeo which often had full arcade quality game ports as well as arcade quality games made for them.

Indeed. But those were console and had several playfields or A LOT of sprites: something which wasn't possibile on the Amiga without redesigning the architecture.
Quote:

cdimauro Quote: It wasn't useful without extending the CLUT to 128 or 256 entries. Right. I was just pointing out that more color registers are useful for more than bitmaps. Transistors being too expensive for ECS in 1990 with only 32 color registers while AGA in 1992 expanded to 256 color registers because transistors were all of a sudden cheaper defies logic.

Transistors weren't so much expensive at the time, however there was a dictat from the management about that.
Quote:

cdimauro Quote: But it should be still possible, right? It should be possible to license 68k cores from NXP as long as the licenses don't conflict with licenses for 3rd party EOL manufacturers and distributors like Rochester Electronics. Speaking of Rochester Electronics, they are now out of the 68060 while they have 68020-68040 CPUs. The following link is for their 68040 inventory. https://www.rocelec.com/search?q=MC68040 Customers paid hundreds USD per CPU and bought out all of their 68060 inventory though. I believe Rochester has the capability to manufacture more but I don't know if it would be worthwhile. It is not easy as the wafer size is no longer available but they have specialized equipment that can duplicate chips in lower volumes and they may have old wafers that need processing. There are other licensed resellers of EOL Motorola/Freescale/NXP chips so the license is likely not exclusive. Rochester Electronics is the largest though. Only 35% of the 68060 die area used synthesized logic while the rest was customized logic. The customized logic could have been in-house or licensed. Licensed logic could be a problem but maybe that is less likely considering the age. The similar ColdFire v5 uses 100% synthesized logic so it may be helpful to license that core at the same time. The 100% synthesized logic makes it easier to layout the logic and change fab processes but custom logic blocks are more optimized. Custom blocks likely wouldn't be needed to meet 68060 timing requirements with a semi-modern fab process. The HDL and development tools are likely old and it would be good to get an architect that has experience with them and could modernize the development. I have more questions than answers myself. I would want to have a few million USD in financing before asking questions. The license fees for ARM cores are usually $1-$10 million USD to put that in perspective. I would hope a core like the 68060 which is very old, generates negligible revenue for NXP and would need significant development, could be licensed for a reasonable cost in comparison to an ARM license for a core.

Exactly, but the point is that a core with 100% synthesized logic is needed to have a 68k processor (whatever it was. 68060 is better, of course) suitable to be ported to modern fabrication processes. This is the bare minimum required.

And this is especially needed if you want to make changes to it, to make it more modern.

How much this cost and if this is possible, are the big questions...