Turrican3 Quote:

I see you've been advocating for a modern 68K as a reasonable evolutionary path for the Amiga for a long time, but I'm still a bit confused about why you believe it would be a better choice compared to ARM (except perhaps extremely high or even 100% compatibility with native applications - but CPU is only a fraction of the Classic architecture, what should we do with the custom chips? I mean isn't it likely the whole Classic would end up being sandboxed/emulated, and if so what would be the point of keeping a 68K architecture, albeit a modernized one?)

Amiga compatibility is a huge reason to modernize the 68k. It could be a standardizing force that unites the Amiga community if it was developed professionally and the performance/price was improved with an ASIC. The 68k has been overlooked for a long time despite still having one of the best code densities with performance metrics (it doesn't sacrifice performance for code density like many compressed ISAs). I believe a 64 bit 68k ISA with significantly better code density than ARM AArch64, RISC-V RV64C and x86-64 is achievable and would be appealing in the embedded market again. Retaining 68k 32 bit compatibility allows it to appeal to retro, hobbyist and embedded 32 bit markets other than the Amiga.

There need not be a short term goal to sandbox anything. That would be for a true NG AmigaOS which breaks compatibility if necessary or desirable. The Amiga can be successful without competing on the desktop. Some users likely would use it for low end desktop use like Amiga NG (AmigaOS 4, MorphOS, AROS x86-64) are used today despite also lacking NG desktop features. Amiga compatibility is more important than desktop features for now and a true AmigaNG OS could run on the same standard hardware beside an improved classic AmigaOS.

Turrican3 Quote:

What would the hypothetical company behind it, the developers and (arguably most of all) the end users gain from such a choice?

There should be consolidation of Amiga IP and the AmigaOS under one roof for it to work. Putting it together currently looks like the hard part (I believe it will happen because it needs to happen). The AmigaOS businesses need to realize that MorphOS and AROS on x86-64 will be first and higher performance while 3rd party emulation on the RPi has destroyed any remaining PPC hardware market and left very narrow margins for an ARM port that is either relatively low performance with emulation or low compatibility with a native AmigaOS. Porting the AmigaOS to ARM could cost millions and if anything it will be less compatible than PPC. Lack of compatibility and poor performance/price were problems with AmigaOS 4 PPC hardware and an ARM port could be repeating the same mistake.

Kronos Quote:

I can emulate an Amiga that actually was on pretty much any HW released in the last 20 years or I can still kinda emulate it on a 20-100€ FPGA system. Results are the same. I can emulate an Amiga that never was (and never should have been) on sub 100€ HW much better that doing it on >200€ FPGA systems. As for running an Amiga as it should have been today, well thats not a thing (and never will be) but I can do the next best thing on 17+ year old Macs. Anyone who thinks that anything Amiga is a big enough market to allow for an ASIC (beyond A500-in-a-joystick, maybe not even that) is delusional. Anyone who think one could leapfrog the 68k ISA 25 years forward with just a few millions lacks some basic understanding.

An ASIC is a game changer for competitiveness. It is not necessary to make a tiny little Amiga 500+OCS/ECS SoC ASIC like Jeri Elsworth was planning for the toy industry.

The Amiga on a Chip Project - Too bad it was canceled
https://www.youtube.com/watch?v=5uaDzF99a80

The RP2040 SoC ASIC sells for $1 and contains several times the transistors a 68060+AGA SoC would need. Most of that $1 price is likely not for transistors but for packaging, testing, shipping, etc. The 40nm process is older but that allowed professionally designed CPUs to achieve ~3GHz so a 1-2GHz 68060 is possible (1st gen Intel Core i7 reached 3GHz @45nm). Even with some profit margin added in, I could see Amiga 68k accelerator board producers buying tens of thousands of these a year (price drops would likely increase demand by many times). Jeri mentions that the Amiga chipset SoC was easier to reverse engineer and a more straight forward design than the C64 hardware. It helps to have the schematics which an original Amiga engineer gave her. This is the kind of excitement that projects like this inspire even from ex-developers who often want to help. Yes, it would cost millions to develop and produce an ASIC but that is the difference between niche market amateurs and competitive professional businesses.

amigang Quote:

Find that a odd statement when just this year the A500 mini proves the emulation market can make you money. Amikit XE according to it dev, the Pi version sold extremely well, Pimiga had 1,000s of downloads. Then you have Pistorm, different kind of emulation market, but again its a market that done pretty well for the dev, and has massisly brought down the cost to upgrade Classic Amiga Finally the company that owns Amiga, literally made most of its money selling Amiga Emulation software, Amiga Forever. This is a business and money to be made in this market.

There is diverse emulation hardware with the only standard being 68020+RTG/AGA. There generally isn't much money to be made off the emulation either. THEA500 Mini likely made most of its money due to the eye candy case, tank mouse replica, CD32 pad replica and licensed game pack. The emulation is not the selling point and Retro Games Ltd has made comments in interviews suggesting they wished they could have made the hardware better.

Darren Melbourne https://metro.co.uk/2022/04/08/a500-mini-amiga-console-interview-thats-our-passion-for-commodore-16427365/ Quote:

I’ll turn the clock back again to 2004. We managed to rebuild the entire chipset of a C64 on one chip. And when I say we, I mean there’s a genius called Jeri Ellsworth who is a lone woman who lives out in Portland, Oregon who’s an absolute genius. And I spent quite a lot of time with her. We redesigned how we wanted the chip to work, and she got it running on one chip; that is utterly unique for one person to be able to do, the job she did is normally the job of an entire fabrication factory. We weren’t able to replicate that for the Amiga, Jeri’s off doing other marvellous things in AR and VR. We looked at doing it again but to create a bespoke solution for it would’ve been prohibitively expensive, so it is an emulation.

Retro Games Ltd. wanted an Amiga SoC ASIC for THEA500 Mini! I'm sure they would have loved to have official Amiga branding too. The end product is the right idea but comes up short of what should be done. We need a fully functioning modernized Amiga 1200 (Maxi) and CD32+ with a 68k Amiga SoC ASIC! Retro Games Ltd. is too small to do the Amiga justice itself and doesn't own the Amiga IP or AmigaOS. We have Amiga road blocks that shouldn't exist. Cooperate and raise the money to do Amiga right or get out of the way!

amigang Quote:

The missing link to me is combining these markets to one strategy, what if Amiga made its own Arm board like the Pi with that maybe had Pistorm features built in so it be easier to put in real classic Amiga but could also be used on its own, and to get costs down the same board released as a console version sold inside say a A1200 mini but this time featured a much more advance system like Amikit XE out of the box, with a special emulator written that allows it to access more powerful GPU features on the emulated Amiga. Combine that with a online store, that devs could post to and have the same system on Pc, Mac, Linux, Android. With competitions and active engagement with the community to make games and apps for the new system.

Why waste money on foreign incompatible hardware instead of organic native 68k Amiga development? The 68k Amiga is still a beautiful efficient small footprint system which is ruined by emulation!

kolla Quote:

Nope, that’s not how it worked/works. Only when running the OS entirely on the 68k and only using powerpc as a co-processor, which was running its own OS kernel (either PowerUP or WarpUP) could 68k and PowerPC coexist. Once MorphOS and OS4 booted on the PowerPC, first thing that happens at boostrapping is that 68k hands over all control to PowerPC and then turns itself off. All 68k code under MorphOS and OS4 when running on CSPPC and BlizzardPPC is done by software emulation, trance and petunia respectively, and NOTHING runs on the 68k, which is very much “offline”.

The built in 68k emulator is used today but my understanding is that the 68k was used for development and testing of AmigaOS 4. I have heard from early beta testers that AmigaOS 4 originally ran on the 68k. Amiga 68k modules were gradually replaced with PPC native ones.

@matthey

Quote:

The built in 68k emulator is used today but my understanding is that the 68k was used for development and testing of AmigaOS 4. I have heard from early beta testers that AmigaOS 4 originally ran on the 68k. Amiga 68k modules were gradually replaced with PPC native ones.

Due to lack of PPC accelerators I believe was the case, if you write C code you can write code that can be compiled on 68K or PPC, and to large extent on other CPU’s as well, 68K system is a good proximation, its also good for testing.

The idea was to move away from 680x0 assembler and BCPL to C code.

Last edited by NutsAboutAmiga on 19-Sep-2022 at 10:55 PM.

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@matthey

Quote:

matthey wrote: Putting Gunnar in charge would not be a good idea. It reminds me of the time on the Natami forum when Gunnar asked about adding more 68k registers and the consensus of developers was that it was not necessary and would take away from the simple design. Gunnar was flustered, continued to argue for it and eventually did it anyway, in an even bigger way with many banks of registers. The additional registers are awkward, difficult for compilers to use, increase decoding overhead, increase power and resource requirements and make code density worse while likely providing minimal performance. The original 68000 ISA was decided by a team of developers at Motorola not by one person even though there were leaders with a vision of what they wanted it to become and this had requirements.

That's exactly the point I am making here. Gunnar was the example, not the offer.
What's to stop a new "Gunnar" type person stepping up and doing it again. There is no team of Motorola developers who have been building 68K up from the ground, hidden away, busy working on it with the same vision, and all these other developers you mention like Jerri etc are just like Gunnar with their own ideas on how things should be. (No offence to Jerri, she is amazing) Still, all of it may end up not the way "you" or someone else would have done the extensions/additions. Another "Gunnar"

Quote:

Multiple cores are not much more difficult as most of the logic is cut and paste. Even simple embedded CPUs often use 2 cores. An example is the $1 RP2040 SoC with 2 cores. A first design could be single core for a variety of reasons though.

Oh come on now lol.
A redesign (which it would be) of ASIC and re-tool is f-ing expensive. What are you on about.
Why not ask Broadcom how much it cost to make that $1 chip to be created in the first place.
Teams of people were used over many years. Not just, "hey, tape out my design (x) for $4 I made last week please."

Quote:

Feedback from developers and customers about product compatibility and suitability are important for acceptance. This is where the Apollo core went drastically wrong with Gunnar dictating everything. The result is no Apollo core licenses from businesses and no compiler support for the new ISA.

Whom exactly are these developers you speak of? The mystic Motorola team you are going to fund? and who is in charge of determining the correct "vision" The new Gunnar? Jerri? You? and what makes the design this mystic "Gunnar" suddenly, correct? Judged by?
I smell $$ many $ and quite probably, many years of arguments.

Quote:

There are developers who worked on modernizing the 68k Amiga 2 decades ago (MiniMig ~2005, Jeri Ellsworth Amiga SoC ~2005, Cone-A ~2005, Boxer ~1997). Many have donated their time working for free and some bought expensive materials and equipment out of pocket in the process. FPGA Projects have become more and more advanced, higher tech and more mature. FPGAs are used to design logic for ASICs but there are Amiga users who want to throw it away and use emulation instead of pulling the work and developers together to make it a reality in hardware again. It is way more practical now to make 68k Amiga hardware than it was back in 1985. The whole CPU, chipset, GPU and memory can all easily fit in an inexpensive single chip today which Jay Miner could have only dreamed of.

Because FPGA and emulation is inexpensive in comparison and if (A Person) doesn't like it, they can modify it, cheaply, to their vision on what they think it should be like. Again, the point I am making here on cost to change. People fighting over how an ISA is exactly the issue with Gunnar etc, as you have already mentioned. Being able to change that in FPGA or emulation is always going to be "accessible" and test/debate/change with whoever etc.

Quote:

Transitioning to more advanced 68k hardware should be easier than transitioning to little endian ARM which really makes the most sense as it is much better supported. The 68k Amiga hardware could have very good backward compatibility while ARM needs emulation. Early PPC Amiga hardware still had a 68k CPU which retained compatibility and eased porting as parts of the AmigaOS could be run on the 68k. PPC was also big endian..

ARM is Bi-Endian. It can and does operate in both modes. It's not an issue as per Emu68 currently being worked on by Michal.Schulz. Besides, easier isn't always cheaper or better. Coding will still have to be done.

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NutsAboutAmiga Quote:

The idea was to move away from 680x0 assembler and BCPL to C code.

AmigaOS 4 development started with AmigaOS 3.1 so there likely wasn't any BCPL code left (BCPL artifacts yes but code no). What else was 68k assembler besides the exec kernel, FFS and AREXX? More than likely the time consuming modernization was to GCCify the C code with GCCisms. The AmigaOS 3 development team then likely came and removes the GCCisms and recompiled with SAS/C. Well, Intuition was converted to something besides the Green Hills compiler which lacked definitions for Amiga library function reg args so that was a definite improvement with either compiler.

SHADES Quote:

That's exactly the point I am making here. Gunnar was the example, not the offer. What's to stop a new "Gunnar" type person stepping up and doing it again. There is no team of Motorola developers who have been building 68K up from the ground, hidden away, busy working on it with the same vision, and all these other developers you mention like Jerri etc are just like Gunnar with their own ideas on how things should be. (No offence to Jerri, she is amazing) Still, all of it may end up not the way "you" or someone else would have done the extensions/additions. Another "Gunnar"

There is always the potential to get another bad leader when replacing one. The key is not to give them total power. Business shareholders or directors can remove or replace bad leadership provided a single shareholder does not own too many shares (more than 50% of shares is complete control but even a high percentage can be a problem like with Irving Gould at CBM). The idea is to spread and delegate the power instead of concentrating it and to select good leaders to start with.

SHADES Quote:

Oh come on now lol. A redesign (which it would be) of ASIC and re-tool is f-ing expensive. What are you on about. Why not ask Broadcom how much it cost to make that $1 chip to be created in the first place. Teams of people were used over many years. Not just, "hey, tape out my design (x) for $4 I made last week please."

Millions of dollars would be required but I don't see it as expensive. It's much cheaper and easier to develop an ASIC today than back in 1985. It's likely to get cheaper yet with all the new fabs being built. The biggest costs are likely to be development labor, masks and the first batches of chips. Labor is expensive but it could possibly be kept down by partially paying with shares in the business which also encourages good work. There is not much that can be done about the masks but hire professionals that should be able to minimize the number of masks. The ASIC chip costs are miniimized by starting with low cost chips. A batch of 100,000 chips that only cost $1 is only $100,000. The BOM is expensive when using high margin commodity ASICs too. A $1 ASIC from Freescale/NXP may sell for $10 where 10,000 chips would also cost $100,000. A custom ASIC should be able to minimize the number of parts external to the SoC and reduce the board size saving money. It costs money to do business but an ASIC today is possible for even small businesses.

The $1 RP2040 SoC ASIC is not a commodity Broadcom SoC. It is the RPi Foundation expanding and cutting out the middle man Broadcom. Broadcom likely doesn't have as much margin as NXP but it is still likely significant. The RPi Foundation can customize their ASICs exactly to what they want instead of using smart phone SoCs. With the success of the RP2040, I expect they will expand their custom SoC offerings and gain experience. The RP2040 really should not have taken that long to develop with ARM a la carte.

SHADES Quote:

Whom exactly are these developers you speak of? The mystic Motorola team you are going to fund? and who is in charge of determining the correct "vision" The new Gunnar? Jerri? You? and what makes the design this mystic "Gunnar" suddenly, correct? Judged by? I smell $$ many $ and quite probably, many years of arguments.

I would try to get Mitch Alsup as chief architect of the CPU. He was developing a variable length RISC architecture that encodes 8, 16, 32 and 64 bit data in the code like the 68k which reduces the number of instructions with minimal additional encoding overhead. RISC-V RV64C uses a variable length encoding but it doesn't use variable length data in the code to improve code density and save instructions. This architecture with a 16 bit encoding base actually isn't that much different than the CISC 68k, which he also has experience with. He was chief architect of an AMD CPU with a 5GHz target and helped design an 88k OoO CPU before that at Motorola. A fabless semiconductor business could develop both architectures at the same time rather than betting the farm on the 68k. The Amiga could switch to the new RISC architecture if there was an advantage. HDL from other existing 68k cores could make it into a design and even the the 68060 should be considered for licensing if it could be easily enhanced and moved to a new process quickly enough.

The Amiga is blessed with plenty of talented FPGA HDL developers. I would love to get some of the original Amiga developers involved which would not only be great for PR but they understand the Amiga and are super talented as well. Open your eyes and look around. We just need to pull it together and actually make it happen again after so many projects were aborted just short of their goals. The Amiga will eventually run out of opportunities as their have been too many missed already and we aren't getting any younger.

SHADES Quote:

Because FPGA and emulation is inexpensive in comparison and if (A Person) doesn't like it, they can modify it, cheaply, to their vision on what they think it should be like. Again, the point I am making here on cost to change. People fighting over how an ISA is exactly the issue with Gunnar etc, as you have already mentioned. Being able to change that in FPGA or emulation is always going to be "accessible" and test/debate/change with whoever etc.

It may save time to leave the Amiga chipset in FPGA at first. Even with the chipset in ASIC, I believe a FPGA for chipsets would be a major asset. I think many developers would accept the enhancements of SAGA but there are plenty of other AGA+RTG capable chipset cores available too. Ideally, we get the schematics out and closely examine and test any official chipset core. The Apollo core CPU ISA needs to go if seriously considering an ASIC though. I think the majority of developers would back me up on this. I don't mean to dictate anything but rather want to stop a single person from dictating a mistake. I never finished the 68k64 ISA because I needed to consult with a professional and reasonable CPU architect. Someone like Mitch Alsup would bring instant credibility and professionalism to such a project. I would love to hear his opinions on a new 68k 64 bit ISA but I would rather not waste his time if there is no hope of it going anywhere. While I was on the Apollo team, I tried to get Gunnar to bring in more developers to build a consensus but this is not what he wanted. Team members were just idea people for him and I have heard similar comments from other team members. I wished Jens and Chris would take part in ISA discussions but Jens and Chris were rarely active on the forum.

SHADES Quote:

ARM is Bi-Endian. It can and does operate in both modes. It's not an issue as per Emu68 currently being worked on by Michal.Schulz. Besides, easier isn't always cheaper or better. Coding will still have to be done.

Bi-endian is better for marketing than hardware. ARM is natively little endian as the code is always in little endian format. Compiler support is much better for little endian mode. Using big endian mode on ARM is not as simple as a compiler switch. Read Renee Cousins experience with big endian ARM for the Buffee project where it took 4 attempts and physically byte swapping hardware lines to get it working optimally.

https://www.buffee.ca/advantures-in-big-endian-land/

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@matthey

Quote:

matthey wrote: There is always the potential to get another bad leader when replacing one. The key is not to give them total power. Business shareholders or directors can remove or replace bad leadership provided a single shareholder does not own too many shares (more than 50% of shares is complete control but even a high percentage can be a problem like with Irving Gould at CBM). The idea is to spread and delegate the power instead of concentrating it and to select good leaders to start with.

It happened once, it can happen again, it can happen regardless of a single leader or not.
All this infighting over a new 68K ISA vision that no one can agree on, is not going to sort itself out by spreading power over shareholders and bank rollers that have a say in the team, if you even can get that far.
If anything, it's more than likely not going to go the way you want, again.

Quote:

Millions of dollars would be required but I don't see it as expensive. It's much cheaper and easier to develop an ASIC today than back in 1985.

LOL You are not getting it. Cost Vs what's already available/good enough~better.
Sure it's cheaper than 85 to create an ASIC. Not cheaper than FPGA/Emulation, not even in the same ballpark. Nope. Not even close. That's without creating and implementing new agreed structures.
Neither are the skilled engineers to help design and ratify an ISA that everyone agrees on. Whoever this "everyone" is going to be. Clearly not Gunnar of Appolo? LOL This point you make is near insanity.
I like the dream though.

Quote:

I would try to get Mitch Alsup as chief architect of the CPU. He was developing a variable length RISC architecture that encodes 8, 16, 32 and 64 data in the code like the 68k on his own. RISC-V RV64C is variable length but it doesn't use variable length data in the code to improves code density and reduces the number of instructions with minimal additional encoding overhead.

That's your preference, not the business shareholders or, other group decision makers.
What's to say he doesn't do another Gunnar anyway, if this is your dream team.
There is more to an ISA than just code densities, it depends on what you aim to do and general based CISC ISA always make compromises. Again, going to be up to a team of people, built by bank-rollers and their dreams of making a return etc.

Quote:

The Amiga could switch to the new RISC architecture if there was an advantage. HDL from other existing 68k cores could make it into a design and even the the 68060 should be considered for licensing if it could be moved to a new process quickly and easily enough.

Exactly. There are already decent ISA RISC SoC platforms available that could take over in a cheap, cost-effective way, without trying to re-develop/modernise from an old CISC 68K standard, without trying to get Mitch and a team together to decide on yet another ISA extension, just for code densities a little better than what is already available, maybe slightly easier, yet to be even tooled, chip.

Quote:

It may save time to leave the Amiga chipset in FPGA at first. Even with the chipset in ASIC, I believe an FPGA for chipsets would be a major asset. I think many developers would accept the enhancements of SAGA but there are plenty of other AGA+RTG capable chipset cores available too. Ideally, we get the schematics out and closely examine and test any official chipset core. The Apollo core CPU ISA needs to go if seriously considering an ASIC though

AGA or even AAA is dead. It's slow compared to now, and offers nothing other than compatibility for older games/demos/apps that bang it directly. Even emulation can take care of that. FPGA suits it fine or make it a software library. The graphics of next-gen anything do not need to be restricted by AGA/AAA. Heck the Pi GPU can even do 4k decode and is built in. Now, if you're going to re-write AGA to be competitive against say, Mali etc, well then, team up again? How's the benefit Vs what's already on the table cost wise? There are stakeholders going to invest here.
A benefit for going ASIC for custom on a single chip Amiga chipset is power consumption. Creation cost = no way.

Quote:

Bi-endian is better for marketing than hardware. ARM is natively little endian as the code is always in little endian format. Compiler support is much better for little endian mode. Using big endian mode on ARM is not as simple as a compiler switch. Read Renee Cousins experience with big endian ARM for the Buffee project where it took 4 attempts and physically byte swapping hardware lines to get it working optimally.

Just marketing eh? How's it work if it's just marketing. Michal uses it in his metal Emu68. Maybe he should be on "the team" lol
The hardware supports it and compilers can be improved if needed. They do improve.

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@kolla

Quote:

kolla wrote: @agami Well, RISC-V was topic at conferences long, long becore corona, it didn’t just pop up out of nowhere recently. My point is simply that the architecture wasn’t created in some sort of vacuum, it evolved over the years by playing ball with software developers, in particular compiler developers. Anyone who wish to revive 68k need to do the same to have any hopes of success.

I don't need to go to a RISC-V conference to know that about RISC-V architecture development and evolution.

RISC-V is a relatively new architecture and it is also Open Source, so it makes sense to have that level of consultation with developers.

With a 68k renaissance, the starting point is a known quantity. As I specified in my hypothetical project, consultation with a select board of stakeholders would be included. But as it would be a commercial architecture, there would be limits as to what and when stakeholder contributions get implemented.

The chief architect, whoever that might be, would follow the project charter and have final say.

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@SHADES

Quote:

SHADES wrote: ... Michal uses it in his metal Emu68. Maybe he should be on "the team" lol ...

No laughing matter. Were it my project, I would certainly try very hard to get him to be part of the team.

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@agami

Quote:

No laughing matter. Were it my project, I would certainly try very hard to get him to be part of the team.

I'm laughing because this dream-team is going to cost a fortune. Just in think-tank.
That's before getting an ASIC 68K ISA design agreed upon and before cost to have someone tool it and tape it out.
That's not even including GPU design, let alone, custom-AMIGA-chipset if you want to restrict back down to that level again, which defeats the purpose of trying to go modern speed in the first place.

Michal is already using big-endian mode on the ARM with the current compiler. Can the compiler be improved? Well, can any and ALL compilers be improved?

Even if some sheer cosmic joke comet rides past the earth making the billionaires all want a modern 68K CPU for sh#$ and giggles, a compiler will need to be made to use any of the new agreed improved ISA stuff anyway and then coding/porting the PPC stuff over again. Multiple cores, more coding/porting changes again. All this when other alternatives that are cheap, perhaps even better (debatable?), already exist.
Sorry, I just don't see it.

ARM big-endian support is already there, with a hell of a lot of stuff already. It works, is proven, has decent density already and it's cheap!

Even Matthey is talking about $1 RISC chips out there that are more powerful than current 68K offerings. Kind of killing his dream right there, really.
You have to bring something a lot better to the table to start and just how much better would it need to be to invest that kind of capital? i'd say, substantial

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@matthey

Quote:

The RP2040 SoC ASIC sells for $1 and contains several times the transistors a 68060+AGA SoC would need. Most of that $1 price is likely not for transistors but for packaging, testing, shipping, etc. The 40nm process is older but that allowed professionally designed CPUs to achieve ~3GHz so a 1-2GHz 68060 is possible (1st gen Intel Core i7 reached 3GHz @45nm)

Core i7-975 EE is shipped with up to 3.33 GHz clock speed. https://en.wikipedia.org/wiki/List_of_Intel_Core_i7_processors#Nehalem_microarchitecture_(1st_generation)

My liberated Xeon X3440 (1st gen Core i7, 45 nm) was overclocked past 3 GHz, hence it has a similar silicon quality as Core i7-9xx EE.

To support high clock speeds, Nehalem microarchitecture has 14 stage core pipeline.

45 nm-based QorlQ P5 (based on 64-bit e5500, seven-stage out-of-order pipeline, missing AltiVec) can reach 2.5 Ghz.

68060's FPU is not pipelined.


According to Mitch Alsup, the canceled AMD K9 was designed to be close to 95% of the original K8 IPC but reach 5 GHz frequency in a 35 nm process. The canceled AMD K9 has inferior IPC when compared to K8!

Last edited by Hammer on 20-Sep-2022 at 06:39 AM.

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@matthey

Quote:

Why waste money on foreign incompatible hardware instead of organic native 68k Amiga development? The 68k Amiga is still a beautiful efficient small footprint system which is ruined by emulation!

Why waste money on RISC / SoC / ASIC, i said it many time now, you can get a pi zero 2w board that can run A1200 at 68040+ speeds for £7, yes there supply issues at the moment but I’m sure there be sorted.

How cheap do we need to go? Again the A500 mini proves how cheeky you can be with the price of £120 for basically the same underline hardware that retro game ltd got designed for there system, likely at the same price, as the pi zero 2w has better features like a wifi chip.

Arm boards are dirt cheap if you go on Chinese wholesale websites with many manufacturers, why ignore that?

Emulation could be improved further likely if it was targeting one specific arm chip and devs knew all the features of one chip, look how far console can be pushed when devs are on one chip.

Plus I get it for devs and hardware gurus emulation is not very efficient or a clean way of making a system, but to a good 75% of end users they don’t care as long as it runs and they can play there games from the past that good enough for them.

Last edited by amigang on 20-Sep-2022 at 05:16 PM.

_________________
AmigaNG, YouTube, LeaveReality Studio

@matthey

Quote:

Amiga compatibility is a huge reason to modernize the 68k

No it is not. Not from a commercial perspective at least. No one really cares about ISA at this stage. What people care about are cost per chip and performance per watt. Not ISA.

Well, not completely true, the one or two guys doing the low level assembler to write the few thousand lines of code to glue the millions of lines of linux kernel C code to it might care. But no one else.

Running amiga as emulation under ARM, and in the future RISC-V, on embedded systems is the future. It is more than fast enough to run any and all amiga software that the retro market cares about at more than full speed. What else do they need? And it is cheap. You can today buy 7$ RPi that is more than enough to emulate a real amiga at more than full speed. That is what your "turbo-m68k" will compete against. A 7$ system that emulates an amiga almost perfectly.

Also, I do notice that this is some unique amiga dream/trait. Just be happy with what you have and accept it is a retro platform and hobby. No other retro platform does this. Look at worldofspectrum for example, they thrive and the spectrum still gets more new native software developed and released for it than all of NG amiga does. And no one in the spectrum scene goes "we should build a NG Z80, 64bit, mmu and multicore. Try be more like the spectrum folks.

Last edited by V8 on 20-Sep-2022 at 09:52 AM.
Last edited by V8 on 20-Sep-2022 at 09:50 AM.

@V8

+1

That in the amiga market people still dream of "world power" (to overdo a little) is because Amiga was (at least in europe) mainstream for a couple of years. As Britains even today still dream of the long lost empire parts of the community still dream to get back in the old position. And the old hardware (expecially the chipsets) are part of the "amiga identity". But I think there is some kind of "bubble problem" now. What is still active are hardcore fans very different from people outside so people think because currently active users are enthusiastic about new chipsets people outside think the same. That is not the case in my view.

@thread

I see there two markets/branches

68k as retro market including V4 and PiStorm. Also Michal (Emu68) plans to extend his technology so that you finally directly boot in Aros 68k or AmigaOS without host system based only on emu68. A kind of Amithlon like solution based on RPi. Cool project. This market can and will grow.

Second branch is what people here call "NG". AmigaOS here is in dead end relying solely on expensive and rare custom hardware. More promising is MorphOS after ISA change. We will see when this will be the case and what it will offer. My personal favorite of course is Aros migrating to Linux. We will see when this will be the case but that would offer a universe of new opportunities.

Regarding ASIC for 68k I am sceptical. I do not know how powerful this will be and if there is really interest in this in embedded market today besides bigger platforms like ARM. For me generally hardware is no longer most important (as it was in 80s) but the software side (OS, drivers, applications, games). I currently do not see how such a potential new ASIC Amiga could compete with far bigger platforms that are produced in higher volumes at lower costs and already have a huge software base and lots of developer support. Even games today are big money, it is difficult to play in same league as the big platforms or game consoles. Even Linux with far bigger support has problems there. I think FPGA is perfect for a retro market like ours, what software needs 1 Ghz 68k (if possible at all)? There is also development regarding OS and we get new 68k software (mainly games of course). Reality is what we currently have. In my view all we currently need for the market we have.

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@agami

As demonstrated by Apollo - noone has any interested in a closed source 68k - your project is already a dead duck.

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SHADES Quote:

It happened once, it can happen again, it can happen regardless of a single leader or not. All this infighting over a new 68K ISA vision that no one can agree on, is not going to sort itself out by spreading power over shareholders and bank rollers that have a say in the team, if you even can get that far. If anything, it's more than likely not going to go the way you want, again.

An ISA will target certain markets and affect how and where the hardware is implemented. Gunnar's 68k ISA is optimized for performance given FPGA limitations. It misses the embedded FPGA market where lower resources and improved code density are desirable for a SoC. The TG68K core and 68020 ISA are more desirable for this application. For retro use in FPGA, most of the new ISA features are rarely used and the complexity and lack of orthogonality means that no compilers support the ISA. If moving to an ASIC, the ISA is still not good for embedded for the same reasons as embedded use in a FPGA SoC. For higher end more desktop like performance, the ISA is a joke with a '90s SIMD standard that only supports integer datatypes and 64 bit SIMD unit registers. To be competitive, floating point support and 256 bit SIMD unit registers would be desirable. All those extra banked registers turn into a nightmare wasting resources and increasing power usage for minimal performance gain. CPU architects and compiler writers would roll their eyes and laugh if you asked them to implement his ISA. The ISA really doesn't target any markets in FPGA or in ASIC. There really isn't much fighting about it as nobody could convince Gunnar otherwise. Developers mostly ignore it and support the 68020 ISA which it is compatible with.

SHADES Quote:

LOL You are not getting it. Cost Vs what's already available/good enough~better. Sure it's cheaper than 85 to create an ASIC. Not cheaper than FPGA/Emulation, not even in the same ballpark. Nope. Not even close. That's without creating and implementing new agreed structures. Neither are the skilled engineers to help design and ratify an ISA that everyone agrees on. Whoever this "everyone" is going to be. Clearly not Gunnar of Appolo? LOL This point you make is near insanity. I like the dream though.

Jay Miner could have been content with a 6502 in his Atari chipset computer too. It would have been much cheaper than an Amiga and much cheaper to emulate today. He made the Amiga when it was hard and expensive and we throw the design away now that it is easy and cheap to make. We even have multiple logic designs already developed in FPGA which is the way ASICs are developed but then we stop. It's not like there isn't an advantage to an ASIC either. Performance can be 10 times that of a FPGA or more, production cost can drops to 1/10 or less of a FPGA and power usage is a fraction of a FPGA. The cost and capacity of transistors in an ASIC are mind boggling compared to a FPGA. A modern CPU in ASIC may run at GHz speeds and have MiBs of caches for a few dollars while a FPGA CPU may run at 100MHz and have kiBs of caches for tens of dollars. Adding a semi-modern GPU in an ASIC may only cost a few dollars where the same GPU in FPGA would cost hundreds of dollars.

SHADES Quote:

That's your preference, not the business shareholders or, other group decision makers. What's to say he doesn't do another Gunnar anyway, if this is your dream team. There is more to an ISA than just code densities, it depends on what you aim to do and general based CISC ISA always make compromises. Again, going to be up to a team of people, built by bank-rollers and their dreams of making a return etc.

I have talked about performance metrics with code density plenty of times. Developers have goals and dreams that they sometimes sacrifice for. It is not just about the bankers which is a very anti-business perspective. Businesses are often formed by people who left a bigger business to pursue related goals and dreams. Of course developers and business leaders need to determine if their philosophies fit in the same business. This has to be explored.

SHADES Quote:

Exactly. There are already decent ISA RISC SoC platforms available that could take over in a cheap, cost-effective way, without trying to re-develop/modernise from an old CISC 68K standard, without trying to get Mitch and a team together to decide on yet another ISA extension, just for code densities a little better than what is already available, maybe slightly easier, yet to be even tooled, chip.

I keep an open mind which keeps me from being cornered without options. The old CISC 68k is not bad because it is old. It was not killed off because it was too low of performance or because it was surpassed in code density. In fact, 68k designs had surprisingly good performance especially considering the excellent code density which I will argue that 32 bit embedded successors never surpassed. Performance metrics back up the performance with extreme code density advantage of the 68k. It wasn't just the designs even though the 68060 design is very good. The 68060 is a semi-modern balanced design for embedded use that outperformed the higher performance design of the semi-modern Pentium. The x86(-64) ISA allowed for very high performance due to many performance advantages which the 68k also has but the 68k has significantly higher code density which is a performance advantage itself if instructions counts and memory accesses do not increase like RISC compressed ISAs. With all the RISC hype and compressed RISC papers, did anyone even look at the performance metrics of the original 32 bit embedded CPU? Did anyone care? Did Motorola ever try to improve the 68k ISA or ABI?

The funny thing is that modern RISC has copied many of the old 68k ISA advantages while abandoning RISC ideals.

ARM Thumb2: variable length 16 bit encoding, 2 op and microcoded multiple load/store instructions to improve code density, more powerful addressing modes than most RISC ISAs
AArch64: powerful 68k like addressing modes, powerful standard instructions
RISC-V: variable length 16 bit instructions, 2 op instructions to improve code density

If RISC hybrids are abandoning RISC ideals and coming full circle back to what our old 68k ISA uses then why not keep what we have? What advantage does the 68k ISA have left that hasn't been copied by RISC architectures?

1) reg-mem accesses
+ reduces the number of GP registers needed
+ reduces the number of cache/mem accesses needed
+ improves code density
+ cache/mem accesses + ALU instructions can be pipelined together avoiding load-to-use stalls
+ atomic cache/mem access + ALU instructions
- more design complexity for loads and stores
2) variable length immediates and displacements are stored as part of instructions
+ instructions are not broken apart into multiple dependent instructions which improves performance
+ improves code density
- small decoding overhead

For 1 above, I'm surprised that no RISC ISA has considered just reg-mem loads which has major benefits with most of the reg-mem complexity being in read-modify-write reg-mem accesses. For 2 above, Mitch Alsup is working on it for a new RISC ISA. All these new RISC ISAs missed the boat. Of course x86-64 has both 1 and 2 and executes some of the most powerful instructions of a desktop/workstation/server ISA but it suffers from decoder inefficiency and relatively poor code density which the 68k does not and would not for a separate 68k64 mode.

SHADES Quote:

AGA or even AAA is dead. It's slow compared to now, and offers nothing other than compatibility for older games/demos/apps that bang it directly. Even emulation can take care of that. FPGA suits it fine or make it a software library. The graphics of next-gen anything do not need to be restricted by AGA/AAA. Heck the Pi GPU can even do 4k decode and is built in. Now, if you're going to re-write AGA to be competitive against say, Mali etc, well then, team up again? How's the benefit Vs what's already on the table cost wise? There are stakeholders going to invest here. A benefit for going ASIC for custom on a single chip Amiga chipset is power consumption. Creation cost = no way.

AGA is not dead as long as people are using it. It's not even that good of a chipset enhancement but it is easy to support. The only reason it was slow is because it was on old silicon using the cheapest possible memory CBM could find. The Amiga chipset and chip memory is not slow in FPGA and could be much faster in ASIC. The key to performance is that the logic is very simple. The AmigaOS has reduced abstraction compared to modern desktop OSs which also increases performance for better or for worse (the AmigaOS has been criticized for not enough abstraction sometimes but Carl Sassenrath designed it to be very thin so it could be used for a game console which was practically embedded use back then).

SHADES Quote:

Just marketing eh? How's it work if it's just marketing. Michal uses it in his metal Emu68. Maybe he should be on "the team" lol The hardware supports it and compilers can be improved if needed. They do improve.

Big endian ARM is painful to use but works for now. ARM AArch64 is little endian and deprecating the old ARM ISAs which have big endian support. Eventually, the old big endian support could disappear on newer ARM CPUs. AArch64 supports endian swapping instructions but it is not as efficient when converting everything. Of course having to do the endian conversions at all is less efficient and having to do them on a load/store RISC CPU is less efficient yet but nobody here seems to care.

Last edited by matthey on 20-Sep-2022 at 10:42 PM.
Last edited by matthey on 20-Sep-2022 at 10:32 PM.

amigang Quote:

Why waste money on RISC / SoC / ASIC, i said it many time now, you can get a pi zero 2w board that can run A1200 at 68040+ speeds for £7, yes there supply issues at the moment but I’m sure there be sorted.

RPi hardware supports the RPi platform even if emulating another system. 68040 performance is poor. Even 68060 performance is not good because it is on ancient silicon.

amigang Quote:

How cheap do we need to go? Again the A500 mini proves how cheeky you can be with the price of £120 for basically the same underline hardware that retro game ltd got designed for there system, likely at the same price, as the pi zero 2w has better features like a wifi chip.

It makes one wonder if THEA500 Mini would have come with a RPi Zero 2 W if it was available when they designed the project. The project would have just been a cheesy eye candy case, some retro accessories and a game bundle. Retro Games Ltd. wanted to do better with an ASIC as I pointed out but they are a micro business. They likely didn't even want the ASIC for performance but to lower the cost and improve compatibility. THEA500 Mini would likely have sold several times what it did had it been half the cost.

amigang Quote:

Arm boards are dirt cheap if you go on Chinese wholesale websites with many manufacturers, why ignore that?

There is nothing magical about ARM boards that makes them cheaper to produce. ARM a la carte makes development faster but then licensing costs increase the production price of ARM products. The Chinese can assemble any boards cheap. David Pleasence was going to have a Chinese business manufacture the Amiga had CBM UK won the CBM bankruptcy bid.

amigang Quote:

Emulation could be improved further likely if it was targeting one specific arm chip and devs knew all the features of one chip, look how far console can be pushed when devs are on one chip. Plus I get it for devs and hardware gurus emulation is not very efficient or a clean way of making a system, but to a good 75% of end users they don’t care as long as it runs and they can play there games from the past that good enough for them.

A lot of gimmick emulation hardware gets played a few times and then thrown in the closet due to an unsatisfactory experience. This in not the way to rebuild a platform where exceeding expectations is the key. The RPi platform came out of nowhere by exceeding expectations of very affordable hardware. I don't think this would have happened using Acorn Archimedes emulation and their platform doesn't even have an advanced chipset and retro games that need it.

V8 Quote:

No it is not. Not from a commercial perspective at least. No one really cares about ISA at this stage. What people care about are cost per chip and performance per watt. Not ISA.

Performance/W is important for embedded use but performance/thread (strong cores with single thread performance) is what users want that don't like to wait and like to play games. CISC x86-64 is the standard while the 68k used to be competitive before it was killed for political reasons. Motorola 68k designs were usually better at performance/W as well.

V8 Quote:

Well, not completely true, the one or two guys doing the low level assembler to write the few thousand lines of code to glue the millions of lines of linux kernel C code to it might care. But no one else.

Assembler wasn't going to matter anymore when PPC was designed but now it is dead and the targets it planned to replace are more popular and use assembly code to give them an advantage. Modern compilers still don't beat humans at optimizing (not even close by the following article).

https://tech-blog.sonos.com/posts/assembly-still-matters-cortex-a53-vs-m1/

The ARM Cortex-A53 is one of the most popular ARM CPUs in the world including in the RPi 3 and RPi Zero 2 W. The problem is really that in order RISC CPUs are terrible as instruction scheduling is too hard. This wasn't a problem for the in order 68060 using existing 68k code with no instruction scheduling.

45%-55% of instructions issued as pairs/triplets (existing 680X0 code)
50%-65% of instructions issued as pairs/triplets (targeted 68060 code)

The in order 68060 could outperform the in order Pentium without an instruction scheduler and the Pentium had larger instruction fetch, a wider memory bus, used 34% more transistors and used 73% more power.

V8 Quote:

Running amiga as emulation under ARM, and in the future RISC-V, on embedded systems is the future. It is more than fast enough to run any and all amiga software that the retro market cares about at more than full speed. What else do they need? And it is cheap. You can today buy 7$ RPi that is more than enough to emulate a real amiga at more than full speed. That is what your "turbo-m68k" will compete against. A 7$ system that emulates an amiga almost perfectly. Also, I do notice that this is some unique amiga dream/trait. Just be happy with what you have and accept it is a retro platform and hobby. No other retro platform does this. Look at worldofspectrum for example, they thrive and the spectrum still gets more new native software developed and released for it than all of NG amiga does. And no one in the spectrum scene goes "we should build a NG Z80, 64bit, mmu and multicore. Try be more like the spectrum folks.

This is "640k ought to be enough for anyone" defeatism. The Z80 Spectrum can't do what the Amiga already does with FPGA simulation and emulation showing the biggest Amiga limitations are artificial ones we create. No platform is healthy using emulation alone.

@kolla

Quote:

kolla wrote: @agami As demonstrated by Apollo - noone has any interested in a closed source 68k - your project is already a dead duck.

The Apollo project reveals a few data points. It demonstrates nothing definitively.

_________________
All the way, with 68k

@matthey

Quote:

An ISA will target certain markets and affect how and where the hardware is implemented. Gunnar's 68k ISA is optimized for performance given FPGA limitations. It misses the embedded FPGA market where lower resources and improved code density are desirable for a SoC. The TG68K core and 68020 ISA are more desirable for this application. For retro use in FPGA, most of the new ISA features are rarely used and the complexity and lack of orthogonality means that no compilers support the ISA. If moving to an ASIC, the ISA is still not good for embedded for the same reasons as embedded use in a FPGA SoC. For higher end more desktop like performance, the ISA is a joke with a '90s SIMD standard that only supports integer datatypes and 64 bit SIMD unit registers. To be competitive, floating point support and 256 bit SIMD unit registers would be desirable. All those extra banked registers turn into a nightmare wasting resources and increasing power usage for minimal performance gain. CPU architects and compiler writers would roll their eyes and laugh if you asked them to implement his ISA. The ISA really doesn't target any markets in FPGA or in ASIC. There really isn't much fighting about it as nobody could convince Gunnar otherwise. Developers mostly ignore it and support the 68020 ISA which it is compatible with.

All these desktop extensions you speak of are not going to be sort after in embedded, for the rest, there are SoC already that has this and more at lower power and as you have already noted, enters at $1
Can you make it even better for code densities? Maybe, HOW MUCH better and at what COST. You are fighting at the cheap RISC SoC with a bunch of extras, only looking at extending a 68K that no one even HAS yet. These imaginary extensions.

Quote:

The old CISC 68k is not bad because it is old. It was not killed off because it was too low of performance or because it was surpassed in code density.

That's not the point!
You are competing with SoC that already has good code density, has been in use in embedded, is already low-powered and on board well implemented GPU stacks and I/O already at prices like $7
For what? 68K instructions that haven't even been used in the software, that the embedded market would be using on 68K currently??
I'm sorry, I find this really hard to vision. It's going to cost a fortune to make when the embedded gap is already filled with something not 68K, debatably better.


Quote:

AGA is not dead as long as people are using it. It's not even that good of a chipset enhancement but it is easy to support.

That's not a sane statement. It is dead.
Outside of AMIGA, it doesn't even exist. Name one other area it is used.

Quote:

The Amiga chipset and chip memory is not slow in FPGA and could be much faster in ASIC

LOL
That's not the current ASIC AGA chipset, that's a re-model/re-work of the chipset in FPGA to try and address some of its many shortcomings. When in comparison to other already available SoC chipsets, it's very limited and slow indeed.

Quote:

Big endian ARM is painful to use but works for now.

I am aware it works. People are using it. It is an alternative, which is why I brought this up in the first place. The more it is used, the less shortcomings will arise as the compiler matures.

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_________________
It's not the question that's the problem, it's the problem that's the question.

@SHADES

Quote:

SHADES wrote: @agami I'm laughing because this dream-team is going to cost a fortune. Just in think-tank. ... Even if some sheer cosmic joke comet rides past the earth making the billionaires all want a modern 68K CPU for sh#$ and giggles, a compiler will need to be made to use any of the new agreed improved ISA stuff anyway and then coding/porting the PPC stuff over again. Multiple cores, more coding/porting changes again. All this when other alternatives that are cheap, perhaps even better (debatable?), already exist. Sorry, I just don't see it. ARM big-endian support is already there, with a hell of a lot of stuff already. It works, is proven, has decent density already and it's cheap! Even Matthey is talking about $1 RISC chips out there that are more powerful than current 68K offerings. Kind of killing his dream right there, really. You have to bring something a lot better to the table to start and just how much better would it need to be to invest that kind of capital? i'd say, substantial

Of course it will cost a small fortune. I have no illusions about that.

I have been clear on this in many a post: Any chance of success for a possible resurrection of the 68k architecture and modernization in ASIC for a contemporary context, would pivot on business opportunities that have nothing to do with Amiga or the retro scene.

The retro aspect of a possible 68k architecture renaissance is just a bonus. There is not enough money in the combined retro Amiga, Atari ST, etc. market to ever justify the development and production cost of a new 68k ASIC. I'm not even sure the taping out of the Apollo 68080 would be commercially viable if the returns are solely expected from the Amiga and Atari ST retro community.

I do not speak for others who are pro 68k ASIC. Though I will say that when reading some of their responses out of context, one might get this idea that they are advocating for a 68k ASIC only for Amiga. Though some might think along those lines, it is not universally the case.

Those that advocate that this or that cheap ARM based solution does the job, the job they're talking about is yet another band-aid on the aging and shrinking Amiga retro HW scene. They're approaching it from a personal aspect. The "Be happy with what you have" crowd.
Curiously, I don't recall seeing their voices of contentment when A-Eon was announcing $2,000+ small-batch beta HW/SW solutions?

I'm not saying that a new 68k ASIC should or must happen. I am not "dreaming" about its glorious return, though of course I would welcome it, as would many others. Including the naysayers.

As I have mentioned before, the intricate business plan and architecture I have put together for the development and production of a 3rd commercial consumer computing platform does not even specify a CPU architecture. A phase of the project would evaluate and determine which hardware design would be best suited, and given the current state of the industry would most likely select x86-64 or ARM for the initial iterations. Which means that RISC-V would be evaluated, and were the plan to find adequate funding, I'd have the team look into 68k resurrection. I'm convinced and a lot of the data supports the notion that the 68k was abandoned too hastily. That alone merits a second look at 68k and the viability of renewed market positioning. Plus, it would make for an amazing story.

_________________
All the way, with 68k

@agami

Quote:

Of course it will cost a small fortune. I have no illusions about that.

How does that help this platform?

Quote:

There is not enough money in the combined retro Amiga, Atari ST, etc. market to ever justify the development and production cost of a new 68k ASIC

Agreed. Hence, the alternatives we see right now.

Quote:

The retro aspect of a possible 68k architecture renaissance is just a bonus.

How do you justify that costing. Embedded? Already covered with other options that could be debated are better.

Quote:

one might get this idea that they are advocating for a 68k ASIC only for Amiga.

Already covered by a cheap alternative. Even Amiga. Which could be of even greater benefit, if ported.
Oh, no. More coding costs? Those would have to be done, regardless.

Quote:

I'm convinced and a lot of the data supports the notion that the 68k was abandoned too hastily.

The company was contending with ARM / Intel / IBM and others. So yeah, it was abandoned. It will take a lot to bring it up to scratch and you are now competing with all those years of development done by Mich and others on alternatives already brought to market.

Quote:

Curiously, I don't recall seeing their voices of contentment when A-Eon was announcing $2,000+ small-batch beta HW/SW solutions?

You clearly haven't been listening to the users that are expected to buy-in then.
How many machines have they sold? How many NEW users has the AMIGA ecosystem made/gained off those boards.

That should clear that statement up right away.

Quote:

Plus, it would make for an amazing story.

Ok, you got me. It would. I agree.
I just think efforts to revive the entire AMIGA ecosystem could be done right now, without insane expenses. Michal and others are already proving this.
Have you seen the replacement Agnus/Denise/Garry chips being re-made on the cheap?
It's not new ASIC, but in this case, that's an advantage because new function and fixes can be done without having to refab at all. Would be even better to just forgo the chipset and use a plugin but with no real alternative carrier boards, options are still limited to the original design and BUS runs.

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_________________
It's not the question that's the problem, it's the problem that's the question.