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Poster | Thread | ChrisH
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Re: MAP == A-Eon.com? Part 2 Posted on 4-Jan-2010 23:10:59
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Elite Member |
Joined: 30-Jan-2005 Posts: 6679
From: Unknown | | |
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| @Kronos & everyone From wikipedia Quote:
In the early 1980s, conventional CPUs appeared to reach a performance limit. Up to that time, manufacturing difficulties limited the amount of circuitry designers could place on a chip. Continued improvements in the fabrication process, however, removed this restriction. Soon the problem became that the chips could hold more circuitry than the designers knew how to use. Traditional CISC designs were reaching a performance plateau, and it wasn't clear it could be overcome. It seemed that the only way forward was to increase the use of parallelism, the use of several CPUs that would work together to solve several tasks at the same time. |
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Ironically, additional internal parallelism has been the driving force behind improvements in conventional CPU designs. Instead of explicit thread-level parallelism (such as that found in the transputer), CPU designs exploited implicit parallelism at the instruction-level, inspecting code sequences for data dependencies and issuing multiple independent instructions to different execution units. This is known as superscalar processing. Superscalar processors are suited for optimising the execution of sequentially-constructed fragments of code. The combination of superscalar processing and speculative execution delivered a tangible performance increase on existing bodies of code - which were mostly written in Pascal, Fortran, C and C++. Given these substantial and regular performance improvements to existing code there was little incentive to rewrite software in languages or coding styles which expose more task-level parallelism. |
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The fundamental transputer motivation remains - but was masked for over 20 more years by the repeated doubling of transistor counts. Inevitably, microprocessor designers finally ran out of uses for the additional physical resources - almost at the same time as technology scaling began to hit its limits. Power consumption and therefore heat dissipation requirements are making further clock rate increases infeasible. These factors are leading the industry towards solutions that are little different in essence from those proposed by INMOS.
The most powerful supercomputers in the world, based on designs from Columbia University and built as IBM Blue Gene, are real-world incarnations of the transputer dream. They are vast assemblies of identical, relatively low-performance SoC chips.
Recent trends have also tried to solve the transistor dilemma in ways that would have been too futuristic even for INMOS. As well as adding components to the CPU die and placing multiple dies in one system, modern processors increasingly place multiple cores in a single die. The transputer designers struggled to fit even one core into its transistor budget. Today designers, working with a 1000-fold increase in transistors, can now typically place many. One of the most recent commercial developments has emerged from XMOS, which has developed a family of embedded multi-core multi-threaded processors which resonate strongly with the transputer and INMOS. |
Last edited by ChrisH on 04-Jan-2010 at 11:13 PM. Last edited by ChrisH on 04-Jan-2010 at 11:12 PM.
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