@bison

He's probably referring to this document, where Von Neumann suggests building an adder in such a way that one proceeds from least significant bit to highest, for obvious reasons. See section 5.2, for example. But Von Neumann also gives a reason for this which simply doesn't apply to microprocessors, Quote:

[T]he digits appear in a temporal succession and not simultaneously, cf. 7.1. The details are most simply evident in the discussion of the adder in 7.2.

In a microprocessor, the bits appear simultaneously in the unit, so unless he means something else, he's badly misreading Von Neumann on endianness.

That aside, I've found several websites that agree Von Neumann intended two's complement, but none of them breathe a word on his preferences for endianness, another reason I suspect the author had misread VN.

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