@matthey

Quote:

matthey wrote: One advantage of an ISA in FPGA is that mistakes can be fixed.

And it's a big one. Imagine spending millions on an asic, then discovering something needs to be changed.

Software emulation is even better, because anyone with basic coding skills can modify it. And a Pistorm+RPi is cheaper than a typical FPGA, while having more functionality.

@bhabbott

Fast read & write speed is more important than functionality.
A good graphic card today, can do lot's of cool stuff, decode / encode video,
you don’t need to everything on the CPU.

Last edited by NutsAboutAmiga on 13-Nov-2024 at 10:12 PM.

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@OneTimer1

Quote:

OneTimer1 wrote: Later it still wasn't very popular because all the companies producing accelerator cards targeted the less popular Amiga models like the A4000 or A3000.

There were good reasons for that.

One issue was that the 060 ran hot - too hot to work reliably in the A1200.

As an owner of an 060 in the A3000 I can say that compatibility was an issue too. Also the performance wasn't as good as I hoped, especially in Quake. I bought it partly in the expectation of being able to play awesome games, which didn't happen. Later on some of the compatibility issues were sorted and the rev6 060 ran cooler, but that was too late for me. I should have waited longer!

Quote:

The most popular Amiga was the A500, maybe they should have supported this first.

But the average A500 user wasn't even up for a hard drive and FastRAM, let alone an accelerator card that cost several times more than the machine. What would they use it for?

In the end it was good that the 060 didn't become more popular. 030 cards became very cheap, allowing less affluent Amiga fans to upgrade before the scene completely died. An A1200 with 50MHz 030 is actually a very nice machine for 'retro' Amiga computing. Even today it's fast enough to get on the web, despite encryption sucking up 2/3rds of the CPU cycles (still 5-10 times faster than 56k dialup!). And now we have accurate ports of games like Doom and Day of the Tentacle running at a reasonable speed.

Of course the 060 got more desirable after production stopped, as some retro fans just have to have the best possible example of a 'real' machine no matter what the cost. But less functional 060s are still selling for reasonable prices, and cards to put them on are a lot cheaper today. Most games don't need an MMU and FPU...

Last edited by bhabbott on 13-Nov-2024 at 10:41 PM.
Last edited by bhabbott on 13-Nov-2024 at 10:40 PM.

@NutsAboutAmiga

Quote:

Fast read & write speed is more important than functionality.

No, not at all - functionality first, then speed.

Quote:

A good graphic card today, can do lot's of cool stuff, decode / encode video, you don’t need to everything on the CPU.

Sure, but if basic functionality lacks, that software or user require, then what does it matter? A super fast GPU or CPU doesn’t provide you audio or network.

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@bhabbott

Quote:

the 060 ran hot - too hot to work reliably in the A1200

No? I have A1200s with 68060, and no problem with temperature - no heat sink, no fan. I also have a 68040 card, and that does run hot, even at lower frequencies, so heat sink and fan. In the A3000 I have CSPPC 060+604e and it’s the PPC that runs hot and needs heat sink and fan, not the 060.

All of them Rev 5 at 50 MHz.

Last edited by kolla on 13-Nov-2024 at 10:49 PM.

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@NutsAboutAmiga

modern graphic cards are computer on its own with huge ram and processor

@bhabbott

Quote:

One issue was that the 060 ran hot - too hot to work reliably in the A1200.

My TF1260's 68060 rev 1 @ 50 Mhz works fine. The main problem is the timing issue with certain A1200 batches.

62.5Mhz overclock would need a heatsink.

Quote:

@bhabbott, As an owner of an 060 in the A3000 I can say that compatibility was an issue too. Also the performance wasn't as good as I hoped, especially in Quake. I bought it partly in the expectation of being able to play awesome games, which didn't happen. Later on some of the compatibility issues were sorted and the rev6 060 ran cooler, but that was too late for me. I should have waited longer!

68060's 32-bit external bus is a major bottleneck with Quake's rendering i.e. it behaves nearly like Pentium Overdrive on 486 socket.

Quote:

But the average A500 user wasn't even up for a hard drive and FastRAM, let alone an accelerator card that cost several times more than the machine. What would they use it for?

A500 had 68040-25 or 68030-40Mhz accelerators, but they are less useful without matching 256 color mode display chipset upgrade. It's a chicken vs egg problem when hardware sales need a mainstream killer app.

Japanese console platform vendor's exclusive games have mitigated the chicken vs egg problem.

A500 didn't receive Blizzard PPC's compact BVision RTG upgrade.

PiStorm and Vampire V2/Firebird V4 covered CPU and compact RTG upgrades for the larger A500 retro market.

Phase 5's 040/060 upgrade market is limited by the smaller A1200/A2000/A3000/A4000 install base.

Amiga PowerPC camp didn't tap the larger A500 install base.

For the mainstream market, the Amiga is the "Amiga 500". Commodore killing the "Amiga 500" model nameplate wasn't a wise move.

I prefer the "AAmiga 500" plan ahead of the A600.

Last edited by Hammer on 14-Nov-2024 at 12:52 AM.
Last edited by Hammer on 14-Nov-2024 at 12:29 AM.

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@matthey

Stack chips can continue Moore's Law.

Ryzen 7 9800X3D (3D V-Cache) is desktop class-leading for MySQL. https://tpucdn.com/review/amd-ryzen-7-9800x3d/images/mysql.png

For normal desktop CPU market, MySQL shows external memory bottlenecks with higher CPU core count models.

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https://techcommunity.microsoft.com/blog/azurecompute/performance--scalability-of-hbv3-vms-with-milan-x-cpus/2939814

AMD's EPYC processors with 3D V-Cache can boost HPC workloads.


----------
https://www.electronicsweekly.com/blogs/mannerisms/shenanigans/dei-killed-the-chips-act-2024-03/

Biden-Harris admin's The Chips Act's DEI execution has racially discriminated against Asians and Whites which stalled Intel and TSMC fab construction in the US.

Last edited by Hammer on 14-Nov-2024 at 12:55 AM.

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what is wrong with 68k?

It's obsolete, that's what's wrong with it.

68K was the king in workstations for many years but then RISC appeared and ran rings around it. I mean that quite literally, the the 060 hit 75MHz, at the same time the DEC Alpha was hitting 300MHz.

The complex addressing modes may have been a very good idea in the early 80s when memory was small and expensive, but later on their complexity made the processors difficult to design and slow.

Intel and AMD were able to get aways with it because they could pour enormous amounts of money into engineering the processors and the process tech to build them.

Once Motorola lost it's top end 68K customers there was no point putting money into developing the higher end 68K processors. The natural successor was the ColdFire line (which removed some of the more complex addressing modes) and it continued for a good few years until it's customers also moved to embedded RISC.

The same ultimately happened to PPC when Apple moved to x86, that killed the desktop PPC processors.

@matthey
Quote:

ARM has been increasing the licensing and royalty "taxes" to pay for their expensive war on the x86-64 desktop which could cause an embedded rebellion.

ARM64 is mostly sold into mobile, not embedded. The embedded parts use T32 (formerly Thumb1/2) which saves code space without adding super complex addressing modes.

Quote:

I do not believe ARM64/AArch64 can dethrone x86-64 from the desktop market due to lack of software and software compatibility.

x86 hasn't been challenged on the desktop seriously in decades, that's about to change:
Apple's latest M4 chips beat both Intel and AMD's latest chips, at least on Geekbench. Qualcomm are not quite there but are not too far behind. Nvidia and AMD reportedly both have desktop ARM64 chips in development.

Quote:

CISC cores gain a small but growing advantage due to decreasing SRAM scaling as the more complex logic compared to RISC cores is decreasing in cost relative to SRAM cost and the logic used to improve code density has synergies with the cache savings for reducing the SRAM used.

I don't think this is quite the advantage you think, PowerPC already has some form of code compression, ARM has T32, if code size becomes a problem, I expect the RISC vendors will find a solution.

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@minator

Quote:

Intel and AMD were able to get aways with it because they could pour enormous amounts of money into engineering the processors and the process tech to build them.

AMD's K5 has hit a clock speed wall, hence the reason for purchasing a startup company called NexGen's Nx686 project which turned into the K6. People's skills are an important factor.

Quote:

Apple's latest M4 chips beat both Intel and AMD's latest chips, at least on Geekbench .

Apple's platform lacks the "second source".

For Blender 4.2.x
Apple M4 Max = 432
Apple M4 Pro = 394.77
Apple M4 = 231.61

AMD Ryzen 9 9950X = 597.45
AMD Ryzen 9 7950X = 529.19
AMD Ryzen 9 9900X = 457.11
AMD Ryzen 7 9800X3D (8 cores) = 323.76
AMD Ryzen 7 9700X (8-cores) = 297.83
Shows a memory bandwidth bottleneck

Intel Core Ultra 9 285K = 558.74
Intel Core Ultra 7 265K = 462.88
Intel Core Ultra 5 245K = 323.08

Cinebench 2024 is a bad tool for vector benchmarking.

Last edited by Hammer on 14-Nov-2024 at 05:00 AM.
Last edited by Hammer on 14-Nov-2024 at 04:42 AM.

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bhabbott Quote:

And it's a big one. Imagine spending millions on an asic, then discovering something needs to be changed.

Crippling bugs are more of a worry for an ASIC than ISA enhancements which could be left undocumented. Minor bugs can often be worked around with software or microcode updates. Not everything would need to be redone for a bad bug either. A new mask set would be needed which would likely be less than a million dollars for an older fab process. In some cases, a few chips are fabbed for silicon testing before production. The 68060 is old enough and small enough that the whole CPU should fit in a larger FPGA even with enhancements and could be tested up to maybe 200MHz. Complete circuit testing is better than testing pieces of circuits separately. It is not possible to simulate silicon clock speeds but it is much easier to develop the 68k today than back when the 68k was originally developed.

bhabbott Quote:

Software emulation is even better, because anyone with basic coding skills can modify it. And a Pistorm+RPi is cheaper than a typical FPGA, while having more functionality.

The RPi is cheap enough to use as an embedded building block because of an ASIC. The advantage of an ASIC over a low end affordable FPGA is more than the 10-20 times clock speed improvement as the transistor budget jumps too for larger caches which further increase performance (and functionality). Not having competitive enough silicon means being replaced by someone else's silicon which is happening right now to the Amiga and you act like that is a good thing.

kolla Quote:

No? I have A1200s with 68060, and no problem with temperature - no heat sink, no fan. I also have a 68040 card, and that does run hot, even at lower frequencies, so heat sink and fan. In the A3000 I have CSPPC 060+604e and it’s the PPC that runs hot and needs heat sink and fan, not the 060. All of them Rev 5 at 50 MHz.

I never measured the temps but I suspect my rev6 68060@75MHz was cooler than a 68040@25MHz (both with heat sinks in big box Amigas). It's too bad the 68060 never made it into a laptop. Its almost like the 68060 was designed to run at higher frequencies.

Hammer Quote:

Stack chips can continue Moore's Law.

That actually is a possibility. Higher level caches could use a separate die with a larger node size. CPU logic and low level caches using a small node at the bottom of the die stack, high level caches using a larger node size in the middle and NOR flash on top using the largest node size. A single die is simpler though and likely will remain popular for some time.

minator Quote:

68K was the king in workstations for many years but then RISC appeared and ran rings around it. I mean that quite literally, the the 060 hit 75MHz, at the same time the DEC Alpha was hitting 300MHz.

I've never seen a full 68060@75MHz rated part, only a 68060@60MHz which is rare and most likely rated higher at the request of a particular large embedded customer rather than being available to everyone. There were up to 75MHz rated 68LC060 and 68EC060 CPUs but they were much less threatening to PPC shallow pipeline desktop CPUs.

https://www.rocelec.com/part/01t4w00000PPnwUAAT-MC68LC060RC75

The 8-stage 68060 had a deeper pipeline than many 7-stage Alpha CPUs. A 50MHz clock rating for an 8-stage CPU at 500nm is unprecedented to say the least. There is nothing else close to the 68060 MHz/stage.

CPU max clock rating @ ~500nm process size with pipeline stages and MHz/stage
ARM710@40MHz 3-stage 13MHz/stage
PPC601+@120MHz 4-stage 30MHz/stage
PPC603@160MHz 4-stage 40MHz/stage
Pentium P54C@120MHz 5-stage 24MHz/stage
PPC604@180MHz 6-stage 30MHz/stage
X704@~500MHz 6-stage 83MHz/stage
HP PA-8000@180MHz 7-stage 26MHz/stage
Alpha 21064@300MHz 7-stage 43MHz/stage
MIPS R4400@200MHz 8-stage 25MHz/stage
68060@50MHz 8-stage 6MHz/stage
Average MHz/stage: 32MHz/stage



Considering Motorola/Freescale was testing a 68060@66MHz and announced an availability date for the 68060@66MHz, I would say we have a strong case for sabotage and it looks like an inside job.

minator Quote:

The complex addressing modes may have been a very good idea in the early 80s when memory was small and expensive, but later on their complexity made the processors difficult to design and slow.

Have you ever looked at the addressing modes of ARM64/AArch64? What ISA do you think they most copied to get so many addressing modes? Why do you think classic RISC philosophy ISAs with few addressing modes like MIPS and RISC-V have poor performance?

minator Quote:

Intel and AMD were able to get aways with it because they could pour enormous amounts of money into engineering the processors and the process tech to build them. Once Motorola lost it's top end 68K customers there was no point putting money into developing the higher end 68K processors. The natural successor was the ColdFire line (which removed some of the more complex addressing modes) and it continued for a good few years until it's customers also moved to embedded RISC. The same ultimately happened to PPC when Apple moved to x86, that killed the desktop PPC processors.

There was no need for an incompatible 68k embedded successor anymore than there was a need for an incompatible x86 desktop successor. Incompatible successors are customer losers which is exactly what happened to Motorola/Freescale as they gave up the embedded market. The incompatible PPC AmigaNOne gave up most of the 68k Amiga market in the same way.

minator Quote:

ARM64 is mostly sold into mobile, not embedded. The embedded parts use T32 (formerly Thumb1/2) which saves code space without adding super complex addressing modes.

Mobile is higher margin so very important to ARM but I expect Cortex-A core volumes for normal embedded use are higher. It's similar to how Motorola/Freescale CPU margins were higher for the desktop market than the embedded market but embedded market volumes were much higher. Of course the mobile market did not exist back then.

The only 68020+ addressing modes which are "super complex" are the double memory indirect addressing modes and the 68060 implements them without microcode by breaking them into two instructions. There is no performance advantage to them with an in-order CPU other than improving code density in some cases. The other addressing modes resemble ARM64/AArch64 addressing modes a lot.

minator Quote:

x86 hasn't been challenged on the desktop seriously in decades, that's about to change: Apple's latest M4 chips beat both Intel and AMD's latest chips, at least on Geekbench. Qualcomm are not quite there but are not too far behind. Nvidia and AMD reportedly both have desktop ARM64 chips in development.

Apple likes to use the newest fab processes to gain an advantage. Intel fell behind in their fab technology which made for a good apples and oranges comparison. Compare Apple SoCs to AMD SoCs using the same chip process and any advantage likely has more to do with the design and where resources are used rather than any ISA advantage.

minator Quote:

I don't think this is quite the advantage you think, PowerPC already has some form of code compression, ARM has T32, if code size becomes a problem, I expect the RISC vendors will find a solution.

IBM developed CodePack for PPC which is an interesting library based code compression and Motorola/Freescale developed PPC VLE which is actually a replacement 16-bit variable length encoded ISA because the PPC ISA 32-bit fixed length encoding removed the 2 lowest bits of addresses and displacements. It's much better to design a compressed ISA from inception rather than trying to retrofit one. I expect most PPC users have never used a PPC CPU with code compressed with CodePack or VLE.

@matthey

Quote:

Billion dollar losses on one project are devastating all right. Even if the Iridium loss was avoided and translated to more capital in the chip division, I'm afraid it would have resulted in more PPC development and die shrinks to try to make shallow pipeline PPC cores more competitive. Motorola had leadership/management problems.

True, and I'd have been okay with that. If they had invested more heavily in PowerPC, then PowerPC might still be competitive on the desktop today.

@minator
Quote:

x86 hasn't been challenged on the desktop seriously in decades, that's about to change: Apple's latest M4 chips beat both Intel and AMD's latest chips, at least on Geekbench. Qualcomm are not quite there but are not too far behind. Nvidia and AMD reportedly both have desktop ARM64 chips in development.

ARM suing Qualcomm and recently cancelling their ARM license has put a spanner in the works for that. This infighting could give RISC-V a big opportunity, because this kind of behaviour makes you look for alternatives. RISC-V implementations are still far behind, but they're moving fast...

Hans

Last edited by Hans on 14-Nov-2024 at 05:09 AM.

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@kolla

Quote:

Sure, but if basic functionality lacks, that software or user require, then what does it matter? A super fast GPU or CPU doesn’t provide you audio or network.

Modern GPUs have HDMI audio stream and some GPUs have AMD's TrueAudio Next DSP extensions.

Support for True Audio Next was added to the Steam Audio API in February 2018. The latest version was updated Nov 2022 and includes support for Unity, Unreal, and FMOD.
AMD True Audio Next is supported on RX 5000, 6000, and 7000 series GPUs.

NVIDIA has VRWorks Audio.

NVIDIA's HPC GPUs have NVLink Switch network.

Last edited by Hammer on 14-Nov-2024 at 05:20 AM.

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@bhabbott

Quote:

One issue was that the 060 ran hot - too hot to work reliably in the A1200.

I had a blizzard 060/PPC and it run way coller than my previous 040. Perhaps it was an latter rev

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@matthey

Quote:

The 8-stage 68060 had a deeper pipeline than many 7-stage Alpha CPUs. A 50MHz clock rating for an 8-stage CPU at 500nm is unprecedented to say the least. There is nothing else close to the 68060 MHz/stage. CPU max clock rating @ ~500nm process size with pipeline stages and MHz/stage ARM710@40MHz 3-stage 13MHz/stage PPC601+@120MHz 4-stage 30MHz/stage PPC603@160MHz 4-stage 40MHz/stage Pentium P54C@120MHz 5-stage 24MHz/stage PPC604@180MHz 6-stage 30MHz/stage X704@~500MHz 6-stage 83MHz/stage HP PA-8000@180MHz 7-stage 26MHz/stage Alpha 21064@300MHz 7-stage 43MHz/stage MIPS R4400@200MHz 8-stage 25MHz/stage 68060@50MHz 8-stage 6MHz/stage Average MHz/stage: 32MHz/stage

You didn't factor in the FPU pipeline. Clock speed attainment is based on the slowest part of the CPU core design.

My FPU-less 68LC060 rev4 can clock higher at 75 Mhz which is the shipped CPU with my TF1260.

68060's FPU didn't use PPC601's FPU. Motorola made sure 68060 wouldn't compete against PPC601's FPU workstation target.

Last edited by Hammer on 14-Nov-2024 at 05:35 AM.

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@kolla

Quote:

kolla wrote: @bhabbott Quote: the 060 ran hot - too hot to work reliably in the A1200 No? I have A1200s with 68060, and no problem with temperature - no heat sink, no fan... Rev 5 at 50 MHz.

Interesting.

The 50MHz 060 in my A3000 ran very hot. I cut a hole in the floppy drive platform (which took ages, that steel is tough!) so I could put a fan on it. With the fan it would run fine at 60MHz, but was a bit flaky at 66MHz.

In this thread on Amiga.org, a number of owners remarked that their Blizzard 1260s ran very hot. Perhaps it wasn't just the CPU contributing to the heat. Another factor to consider is that Motorola didn't 'bin' their CPUs by speed or power consumption. Process variation could mean one chip draws more power than another, depending on doping levels etc. Early batches might have had more variation, and of course the original 0.6 μm chips drew more power than the later 0.42 μm chips (which were rated at 66-75MHz).

People these days might not be so concerned about heat when modern CPU are drawing 80+ Watts, but vintage CPUs need to be kept reasonably cool if we want them to last. Then again some of us are getting so old that they might not need to last that long.

@Thread

The 060/50 was definitely cooler than a 040/40, Phase5 mounted fans on early 060/50 boards for psychological reasons, because the system with the 040/40 needed them.

The 040 ran with 5V and may had bigger structures inside, if it comes to power consumption the voltage plays a big part it is not only P = U â‹… I because I s increasing if the internal capacitors needs more current to be charged.

I seem to recall there were XC68060 in the early days which weren't so heat tolerant as later revisions. I would expect those to have active cooling.

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Hans Quote:

True, and I'd have been okay with that. If they had invested more heavily in PowerPC, then PowerPC might still be competitive on the desktop today.

It is unlikely that throwing more money at problems while ignoring technical considerations would have resulted in success. The same is true of Trevor wasting money on the A1222+ to increase PPC competitiveness. Wasting money is not investing.

Hammer Quote:

You didn't factor in the FPU pipeline. Clock speed attainment is based on the slowest part of the CPU core design.

I have explained this to you before. Look at the MC68060 User's Manual "Figure 1-1 MC68060 Block Diagram" on page 1-6. Integer and FPU instructions share the same pipelines (IFP and OEP) until the last 2 stages and all instruction pipeline paths are shown as 8 total stages in the block diagram. Pipelined FPUs may have additional stages but FPU instructions still use at least 8-stages on the 68060. Multi-cycle FPU instructions likely loop through the "FP Execute" stage multiple times but integer instructions can continue executing in parallel as long as another FPU instruction is not encountered which stalls all pipelines until the first FPU instruction finishes executing. A FPU instruction queue like the Cyrix 6x86 uses may be able to avoid most of these stalls with minimum 68060 design changes and low resources.

Hammer Quote:

My FPU-less 68LC060 rev4 can clock higher at 75 Mhz which is the shipped CPU with my TF1260.

The higher 68LC060 rev 4 clock speed is most likely due to improvements in later chip production rather than the FPU. Early revision 68060 chips did not overclock nearly as well as later ones.

Hammer Quote:

68060's FPU didn't use PPC601's FPU. Motorola made sure 68060 wouldn't compete against PPC601's FPU workstation target.

The non-pipelined low latency minimalist 68060 FPU design choice was a reasonable decision for the embedded and even desktop markets at that time. The Cyrix 6x86 design made the same choice but was punished by the horrible x86 FPU ISA. The Pentium supported the horrible FPU ISA at the expensive of better integer performance and was lucky that Quake targeted it, before the x86 FPU was deprecated for a SIMD unit replacement.

OneTimer1 Quote:

The 060/50 was definitely cooler than a 040/40, Phase5 mounted fans on early 060/50 boards for psychological reasons, because the system with the 040/40 needed them. The 040 ran with 5V and may had bigger structures inside, if it comes to power consumption the voltage plays a big part it is not only P = U â‹… I because I s increasing if the internal capacitors needs more current to be charged.

All very true.

CPU | DMIPS/MHz | pipeline | transistors | power@66MHz | price (1000s)
68040 1.1 6-stage 1,200,000 N/A $218
68060 1.8 8-stage 2,530,000 4.9W $308
PPC601 1.4 4-stage 2,800,000 9W $370
P54C 1.4 5-stage 3,300,000 14W $995

Sources:

Motorola Introduces Heir to 68000 Line (Microprocessor Report)
https://websrv.cecs.uci.edu/~papers/mpr/MPR/ARTICLES/080502.pdf

https://preserve.mactech.com/articles/mactech/Vol.10/10.02/ThePowerPC/index.html

Motorola Begins Sampling PowerPC 601 (Microprocessor Report)
https://www.cecs.uci.edu/~papers/mpr/MPR/ARTICLES/070602.pdf

It is clear from the data above why the 68060 could not be clocked up. The Motorola/Freescale CEO had recently joined the AIM Alliance promoting PPC while abandoning their beautiful 68k baby and the 68060 made PPC and him look like a fool. It is funny that the 68060@66MHz power was available data from 68060 testing in 1994, the year the 68060 was introduced, yet I bet nobody here has ever seen or heard of a full 68060@66MHz.

From the MC68040 User's Manual, the 68040 worst case power dissipation was 6.5W at 25MHz, 8W at 33MHz and 9.1W at 40MHz while typical values were about 2/3 of this (there is a large variation depending on buffer mode termination which I don't understand). An early revision 68040@40MHz may run hotter than an early revision 68060@66MHz and my rev 6 68060@75MHz may run cooler than a 68040@25MHz. Dropping from 5V to 3.3V resulted in a major improvement.

https://www.nxp.com/docs/en/product-brief/MC68040V.pdf Quote:

POWER CONSUMPTION MANAGEMENT The MC68040V is very power efficient due to the use of a 3.3-V power supply static logic design. The resulting power consumption is typically 1.5 W in full operation @ 33 MHz - far less than microprocessors that use a 5-V power supply. The 3.3-V power supply reduces current consumption by 40–60% over microprocessors that use a 5-V power supply.

The later 68040V had other design changes and low power features added besides the change from 5V to 3.3V. The FPU was dropped which saves transistors and reduces power. The 68040V was likely modified into the 68040VL/ColdFire 5102.

https://www.cpushack.com/2019/11/01/cpu-of-the-day-motorola-mc68040vl/

As I mentioned earlier, the 68040/68040V pipeline was decoupled into separate IFP and OEP pipelines like the 68060 but remaining 6-stages and the caches were reduced from 68040/68040V 4kiB I+D to 2kiB I+1kiB D which would have further reduced power at the expense of performance. This 68040VL spec would have made a nice upgrade between a 68030 and 68040 had it been available earlier and not lost 68040 compatibility being castrated into ColdFire.

Last edited by matthey on 14-Nov-2024 at 05:14 PM.

@matthey

There's no doubt the 68060 was special compared to previous generations but it's all in the past now. There's never going to be a rejuvenation of the architecture beyond what people can do with FPGA / emulation already.

Read the room. The only people in the market for a modern 68K ASIC are a subset of 68K enthusiasts. There are many Amiga users who don't want much beyond your basic 68000 or 68020 because it fulfills their retro interest. There are a subset of users - across multiple 68K platforms that may be interested in such hardware if it became available. However those in turn are a subset of performance seeking users for which emulation, of any kind, is seen as inauthentic. And when you get to people who are that much of a stickler the chances are not all of them will wan your GHz ASIC either because it's a "clone" and not the real deal.

Spend a few million on development to get a user base measured in thousands at best, that needs at most one or two skus each.

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