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Amigaworld.net News   Amigaworld.net News : A-EON FAQ part 2
   posted by tomazkid on 13-Mar-2010 22:59:38 (14180 reads)
The second part of the A-EON FAQ is now online.

This round has the focus‭ ‬on the features and capabilities of the‭ ‬Xena‭ ‬customisable chip‭ ‬and‭ ‬the associated‭ ‬Xorro‭ ‬bridge slot.


You can read the questions and answers here

If you have questions that you would like answered, please send them by email to amigaworldfaq@a-eon.com .
    

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Draby 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 0:01:25
#1 ]
Regular Member
Joined: 20-Aug-2003
Posts: 231
From: United Kingdom.

Thanks; nice, clearly explained answers.
Richard

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koft 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 0:27:20
#2 ]
Regular Member
Joined: 15-Mar-2007
Posts: 493
From: USA, TN, Memphis

And nothing of any importance was said. BRAVO! Thanks guys! There will be nothing XMOS related for anybody to play with when the nerds pop the machine out of the Styrofoam. Bravo! Y'all really helped out the XMOS devs with an amiga fetish. Cool!

Mod note: Insulting people is not going to fly here. You already have a 7 day ban now from that other thread you made, I'll leave it at that for now.

Last edited by fairlanefastback on 15-Mar-2010 at 03:38 PM.
Last edited by fairlanefastback on 14-Mar-2010 at 06:48 PM.
Last edited by fairlanefastback on 14-Mar-2010 at 06:48 PM.


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cgutjahr 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 0:40:49
#3 ]
Cult Member
Joined: 8-Mar-2003
Posts: 871
From: Unknown

This question was asked, but not answered:

Quote:

‬Does Xena have access to main system RAM‭?

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Hans 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 1:06:17
#4 ]
Elite Member
Joined: 27-Dec-2003
Posts: 4876
From: New Zealand

@koft
This little snippet is useful:
Quote:
Xorro has‭ ‬9VCCs and‭ ‬38‭ ‬GND lines,‭ ‬configured‭ ‬very similarly to a standard PCIe‭ ‬8x connector.‭ ‬The biggest difference is that Xena uses‭ ‬+5v lines where the PCIe connector calls for‭ ‬+12v lines.‭ ‬Xena shares connectivity with a series of CPU GPIO connections to the Xorro JTAG port for control and debugging.‭ ‬The rest of the Xorro slot exposes Xena‭’‬s data links to the outside world.


Particularly this sentence:
Quote:
Xena shares connectivity with a series of CPU GPIO connections to the Xorro JTAG port for control and debugging.‭

This suggests that the Xena chip can be programmed/debugged by both the CPU and externally via the Xorro slot.

Hans


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broadblues 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 2:02:49
#5 ]
Amiga Developer Team
Joined: 20-Jul-2004
Posts: 4326
From: Portsmouth England

minor grumble but it seesm that the html code in the FAQ has rather a lot of &xxxxx; character references, that reslove to ascii characters like '2' and ':' which makes it a tad difficlult to read in AWeb IBrowse etc....

Otherwise thanks for the extra info.


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Kicko 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 2:56:16
#6 ]
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Joined: 19-Jun-2004
Posts: 5008
From: Sweden

Thanks

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thinkchip 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 3:09:59
#7 ]
Super Member
Joined: 26-Mar-2004
Posts: 1110
From: Salt Lake City, Utah, USA

So is the Xena a co-processor? Could you program it to emulate an Intel chip so you could (finally) have a perfect PC emulation in a window? How would the speed compare with a P4? Plug a board in the Xorro slot with legacy ports and support chips and you'd have a complete PC. That would be useful. Would you still have the old emulator speed penalty? If the Xorro slot were exposed, could you plug a cartridge in and program the Xena chip, kind of like the old cartridge slots. Would it be hot-swappable? Just brainstorming.


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KimmoK 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 7:18:43
#8 ]
Elite Member
Joined: 14-Mar-2003
Posts: 5101
From: Ylikiiminki, Finland

@ thinkchip

Xena is a single core Xcore chip running at 400...500Mhz and it has 64k of internal memory.
So, for PC emulation, the PPC should be used, but xena could handle the legacy I/O.


(btw, there is a xcore86 PCI card that costs $65 and it has 1Ghz x86 and 512M...1024M chips internal RAM, I would use that to run x86 SW, or the SW emulation by the PPC.)


@koft

Your negativity blinds you!

@cgutjahr

Connection to CPU local bus. That's sounds like connection to RapidI/O/Conexium/whatever. (but most likely they meant something else)

Anyway... I would be surpriced if xcore could get data from nemo system RAM without the help of the CPU.

Last edited by KimmoK on 14-Mar-2010 at 09:33 AM.
Last edited by KimmoK on 14-Mar-2010 at 08:43 AM.


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Hondo 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 7:30:41
#9 ]
Super Member
Joined: 10-Apr-2003
Posts: 1344
From: Denmark

Quote:
And nothing of any importance was said. BRAVO! Thanks guys! There will be nothing XMOS related for anybody to play with when the nerds pop the machine out of the Styrofoam. Bravo! Y'all really helped out the XMOS devs with an amiga fetish. Cool!


koft I understand your frustration, but please be patient about this whole thing. You're just spreading malice and bad mood around you with this behavior

Now go and get some new boxes of them delicious danish cookies you love so much, and stop thinking about this xmos stuff for now. Eventually we'll know all the answers, and when that time come, we will embrace whatever the dudes made for us, even if they could have done it 100000000000 times better according to diehards.

Greetings from Denmark


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itix 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 9:27:18
#10 ]
Elite Member
Joined: 22-Dec-2004
Posts: 3398
From: Freedom world

Quote:

Does Xena have access to main system RAM ?


They probably dont know yet.


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ChrisH 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 10:06:57
#11 ]
Elite Member
Joined: 30-Jan-2005
Posts: 6673
From: Unknown

@cgutjahr Quote:
Does Xena have access to main system RAM ?

I think they did answer it indirectly:
Quote:
we have roughly one quarter of Xena's output lines connected to the CPU local bus


I also think this was "something of importance", even if Koft is seemingly determined to nay-say anything they do. (Koft, if only 100% full answers will satisfy you, then you're going to have to wait until the release date - no need to act surprised.)

Last edited by ChrisH on 14-Mar-2010 at 10:11 AM.


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BillE 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 10:35:21
#12 ]
Super Member
Joined: 14-Nov-2003
Posts: 1163
From: Northern Scotland

Why is the artical overloaded with question marks, it makes it unreadable.

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DAX 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 10:51:07
#13 ]
Elite Member
Joined: 30-Sep-2009
Posts: 2790
From: Italy

Did I get that correctly about the Xena now being 500Mhz instead of the previously announced 400?


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itix 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 11:14:45
#14 ]
Elite Member
Joined: 22-Dec-2004
Posts: 3398
From: Freedom world

@KimmoK

You asked on another thread:
Quote:

How does xena @ 500Mhz compare to PPC440 @ 500Mhz?


Here are answers:

Quote:

SDRAM is attached to an XCore via XCore ports. This allows 1 XCore thread to read/write to the SDRAM. XCore reads/writes to SDRAM at application level via explicit sdram_read/sdram_write function calls. XMOS development tools treat external memory as any other IO peripheral. Therefore this external memory is data-only and there is clear separation of internal and external memory in application source code.


Quote:

Burst driver has a sdram_write and sdram_read functions that write/read a block of 32-bit words. Address is specified as bank, row and column. Driver is not responsible for refreshing, application must call sdram_refresh at required frequency (this is to avoid "hidden" delays). Overlapping reads/writes are not supported, one row and one only is activated and precharged per call. Burst driver operates at 25MHz CL3, but there is room for improvement by going up to 33MHz. This driver is intended for applications where SDRAM is managed by a single thread and access requirements are very contiguous.

Random driver has a SDRAM_WRITE and SDRAM_READ_BEGIN plus SDRAM_READ_END macros that read/write a single 32-bit word. Read is a split transaction to improve thread utilisation. Address is specified as a 23-bit integer. Each individual read/write activates and precharges a row. This might seem inefficient, but any sensible optimisation at driver level (as opposed to application level) introduces non-determinism. Random driver operates at 25MHz CL2. This driver is intended for applications where SDRAM is dedicated to a single task with non-continguous access requirements. For multiple tasks sharing, a scheduler is required on top of the driver.


Quote:

Peak write rate
burst driver: 50MB/s
random driver: 11MB/s
Peak read rate
burst driver: 50MB/s
random driver: 5MB/s
Single word write (3 threads)
burst driver: 3120ns
random driver: 340ns (3 instructions to issue command)
Singe word read (3 threads)
burst driver: 3520ns
random driver: 720ns (2 instructions to issue command, 2 instructions to collect response (split))


However this driver is useless on AmigaOne.


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KimmoK 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 12:04:52
#15 ]
Elite Member
Joined: 14-Mar-2003
Posts: 5101
From: Ylikiiminki, Finland

Thanks.

So, that's about the access to SDRAM expansion, if that would be added to xorro slot.
PPC440 @ 500Mhz would greatly outperform xena with task that require chip extarna SDRAM access.


I would be interested more in the performance when both chip's internal resources are being used, even though it's difficult to compare.
Perhaps the MIPS rating tells enough.... for xena it's 500Mips max and PPC440 it's roughly twice the amount?


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itix 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 12:41:00
#16 ]
Elite Member
Joined: 22-Dec-2004
Posts: 3398
From: Freedom world

@KimmoK

Quote:

So, that's about the access to SDRAM expansion, if that would be added to xorro slot.
PPC440 @ 500Mhz would greatly outperform xena with task that require chip extarna SDRAM access.


There is an internal L1 cache in 440 (32kB data and 32kB instruction?) so internal SRAM is not getting that much advantage for X-Core. So 440 could easily outperform "Xena" on tasks which fit into L1 cache.

Last edited by itix on 14-Mar-2010 at 12:42 PM.


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mike 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 14:05:34
#17 ]
Regular Member
Joined: 31-Jul-2007
Posts: 406
From: Alpha Centauri

@koft

Whaaaat? BS! We now know not to apply random voltage to the ting, or plug it into the mains... It apparently draws its energy off the surroundings!

Good stuff guys, A+.

No hints of price though?


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KimmoK 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 14:39:27
#18 ]
Elite Member
Joined: 14-Mar-2003
Posts: 5101
From: Ylikiiminki, Finland

@mike

No new hints. It is about 1500. Or "only a little more" in the worst case.
(IMHO, a little more is below 10% more...)


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DAX 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 17:06:31
#19 ]
Elite Member
Joined: 30-Sep-2009
Posts: 2790
From: Italy

@Kimmok
How about : "it is about we just don't know"


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Mechanic 
Re: A-EON FAQ part 2
Posted on 14-Mar-2010 20:14:03
#20 ]
Elite Member
Joined: 27-Jul-2003
Posts: 2007
From: Unknown

Thanks for the update.

As far as access to main RAM, there is always a route thru the 1x slot at the end of Xorro.

Keep in mind Xena, although possible, is pretty useless by herself. however, a single card
with a few chips onboard and Xenas' programmable functions could make for a multi-
purpose combo limited by imagination only. It's gonna take some time and planning.


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